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1 : : /* 2 : : * topic.h 1.8 1999/08/28 04:01:47 3 : : * 4 : : * The contents of this file are subject to the Mozilla Public License 5 : : * Version 1.1 (the "License"); you may not use this file except in 6 : : * compliance with the License. You may obtain a copy of the License 7 : : * at http://www.mozilla.org/MPL/ 8 : : * 9 : : * Software distributed under the License is distributed on an "AS IS" 10 : : * basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See 11 : : * the License for the specific language governing rights and 12 : : * limitations under the License. 13 : : * 14 : : * The initial developer of the original code is David A. Hinds 15 : : * <dahinds@users.sourceforge.net>. Portions created by David A. Hinds 16 : : * are Copyright (C) 1999 David A. Hinds. All Rights Reserved. 17 : : * 18 : : * Alternatively, the contents of this file may be used under the 19 : : * terms of the GNU General Public License version 2 (the "GPL"), in which 20 : : * case the provisions of the GPL are applicable instead of the 21 : : * above. If you wish to allow the use of your version of this file 22 : : * only under the terms of the GPL and not to allow others to use 23 : : * your version of this file under the MPL, indicate your decision by 24 : : * deleting the provisions above and replace them with the notice and 25 : : * other provisions required by the GPL. If you do not delete the 26 : : * provisions above, a recipient may use your version of this file 27 : : * under either the MPL or the GPL. 28 : : * topic.h $Release$ 1999/08/28 04:01:47 29 : : */ 30 : : 31 : : #ifndef _LINUX_TOPIC_H 32 : : #define _LINUX_TOPIC_H 33 : : 34 : : /* Register definitions for Toshiba ToPIC95/97/100 controllers */ 35 : : 36 : : #define TOPIC_SOCKET_CONTROL 0x0090 /* 32 bit */ 37 : : #define TOPIC_SCR_IRQSEL 0x00000001 38 : : 39 : : #define TOPIC_SLOT_CONTROL 0x00a0 /* 8 bit */ 40 : : #define TOPIC_SLOT_SLOTON 0x80 41 : : #define TOPIC_SLOT_SLOTEN 0x40 42 : : #define TOPIC_SLOT_ID_LOCK 0x20 43 : : #define TOPIC_SLOT_ID_WP 0x10 44 : : #define TOPIC_SLOT_PORT_MASK 0x0c 45 : : #define TOPIC_SLOT_PORT_SHIFT 2 46 : : #define TOPIC_SLOT_OFS_MASK 0x03 47 : : 48 : : #define TOPIC_CARD_CONTROL 0x00a1 /* 8 bit */ 49 : : #define TOPIC_CCR_INTB 0x20 50 : : #define TOPIC_CCR_INTA 0x10 51 : : #define TOPIC_CCR_CLOCK 0x0c 52 : : #define TOPIC_CCR_PCICLK 0x0c 53 : : #define TOPIC_CCR_PCICLK_2 0x08 54 : : #define TOPIC_CCR_CCLK 0x04 55 : : 56 : : #define TOPIC97_INT_CONTROL 0x00a1 /* 8 bit */ 57 : : #define TOPIC97_ICR_INTB 0x20 58 : : #define TOPIC97_ICR_INTA 0x10 59 : : #define TOPIC97_ICR_STSIRQNP 0x04 60 : : #define TOPIC97_ICR_IRQNP 0x02 61 : : #define TOPIC97_ICR_IRQSEL 0x01 62 : : 63 : : #define TOPIC_CARD_DETECT 0x00a3 /* 8 bit */ 64 : : #define TOPIC_CDR_MODE_PC32 0x80 65 : : #define TOPIC_CDR_VS1 0x04 66 : : #define TOPIC_CDR_VS2 0x02 67 : : #define TOPIC_CDR_SW_DETECT 0x01 68 : : 69 : : #define TOPIC_REGISTER_CONTROL 0x00a4 /* 32 bit */ 70 : : #define TOPIC_RCR_RESUME_RESET 0x80000000 71 : : #define TOPIC_RCR_REMOVE_RESET 0x40000000 72 : : #define TOPIC97_RCR_CLKRUN_ENA 0x20000000 73 : : #define TOPIC97_RCR_TESTMODE 0x10000000 74 : : #define TOPIC97_RCR_IOPLUP 0x08000000 75 : : #define TOPIC_RCR_BUFOFF_PWROFF 0x02000000 76 : : #define TOPIC_RCR_BUFOFF_SIGOFF 0x01000000 77 : : #define TOPIC97_RCR_CB_DEV_MASK 0x0000f800 78 : : #define TOPIC97_RCR_CB_DEV_SHIFT 11 79 : : #define TOPIC97_RCR_RI_DISABLE 0x00000004 80 : : #define TOPIC97_RCR_CAUDIO_OFF 0x00000002 81 : : #define TOPIC_RCR_CAUDIO_INVERT 0x00000001 82 : : 83 : : #define TOPIC97_MISC1 0x00ad /* 8bit */ 84 : : #define TOPIC97_MISC1_CLOCKRUN_ENABLE 0x80 85 : : #define TOPIC97_MISC1_CLOCKRUN_MODE 0x40 86 : : #define TOPIC97_MISC1_DETECT_REQ_ENA 0x10 87 : : #define TOPIC97_MISC1_SCK_CLEAR_DIS 0x04 88 : : #define TOPIC97_MISC1_R2_LOW_ENABLE 0x10 89 : : 90 : : #define TOPIC97_MISC2 0x00ae /* 8 bit */ 91 : : #define TOPIC97_MISC2_SPWRCLK_MASK 0x70 92 : : #define TOPIC97_MISC2_SPWRMOD 0x08 93 : : #define TOPIC97_MISC2_SPWR_ENABLE 0x04 94 : : #define TOPIC97_MISC2_ZV_MODE 0x02 95 : : #define TOPIC97_MISC2_ZV_ENABLE 0x01 96 : : 97 : : #define TOPIC97_ZOOM_VIDEO_CONTROL 0x009c /* 8 bit */ 98 : : #define TOPIC97_ZV_CONTROL_ENABLE 0x01 99 : : 100 : : #define TOPIC97_AUDIO_VIDEO_SWITCH 0x003c /* 8 bit */ 101 : : #define TOPIC97_AVS_AUDIO_CONTROL 0x02 102 : : #define TOPIC97_AVS_VIDEO_CONTROL 0x01 103 : : 104 : : #define TOPIC_EXCA_IF_CONTROL 0x3e /* 8 bit */ 105 : : #define TOPIC_EXCA_IFC_33V_ENA 0x01 106 : : 107 : : #define TOPIC_PCI_CFG_PPBCN 0x3e /* 16-bit */ 108 : : #define TOPIC_PCI_CFG_PPBCN_WBEN 0x0400 109 : : 110 : 0 : static void topic97_zoom_video(struct pcmcia_socket *sock, int onoff) 111 : : { 112 : 0 : struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket); 113 : 0 : u8 reg_zv, reg; 114 : : 115 : 0 : reg_zv = config_readb(socket, TOPIC97_ZOOM_VIDEO_CONTROL); 116 [ # # ]: 0 : if (onoff) { 117 : 0 : reg_zv |= TOPIC97_ZV_CONTROL_ENABLE; 118 : 0 : config_writeb(socket, TOPIC97_ZOOM_VIDEO_CONTROL, reg_zv); 119 : : 120 : 0 : reg = config_readb(socket, TOPIC97_AUDIO_VIDEO_SWITCH); 121 : 0 : reg |= TOPIC97_AVS_AUDIO_CONTROL | TOPIC97_AVS_VIDEO_CONTROL; 122 : 0 : config_writeb(socket, TOPIC97_AUDIO_VIDEO_SWITCH, reg); 123 : : } else { 124 : 0 : reg_zv &= ~TOPIC97_ZV_CONTROL_ENABLE; 125 : 0 : config_writeb(socket, TOPIC97_ZOOM_VIDEO_CONTROL, reg_zv); 126 : : 127 : 0 : reg = config_readb(socket, TOPIC97_AUDIO_VIDEO_SWITCH); 128 : 0 : reg &= ~(TOPIC97_AVS_AUDIO_CONTROL | TOPIC97_AVS_VIDEO_CONTROL); 129 : 0 : config_writeb(socket, TOPIC97_AUDIO_VIDEO_SWITCH, reg); 130 : : } 131 : 0 : } 132 : : 133 : 0 : static int topic97_override(struct yenta_socket *socket) 134 : : { 135 : : /* ToPIC97/100 support ZV */ 136 : 0 : socket->socket.zoom_video = topic97_zoom_video; 137 : 0 : return 0; 138 : : } 139 : : 140 : : 141 : 0 : static int topic95_override(struct yenta_socket *socket) 142 : : { 143 : 0 : u8 fctrl; 144 : 0 : u16 ppbcn; 145 : : 146 : : /* enable 3.3V support for 16bit cards */ 147 : 0 : fctrl = exca_readb(socket, TOPIC_EXCA_IF_CONTROL); 148 : 0 : exca_writeb(socket, TOPIC_EXCA_IF_CONTROL, fctrl | TOPIC_EXCA_IFC_33V_ENA); 149 : : 150 : : /* tell yenta to use exca registers to power 16bit cards */ 151 : 0 : socket->flags |= YENTA_16BIT_POWER_EXCA | YENTA_16BIT_POWER_DF; 152 : : 153 : : /* Disable write buffers to prevent lockups under load with numerous 154 : : Cardbus cards, observed on Tecra 500CDT and reported elsewhere on the 155 : : net. This is not a power-on default according to the datasheet 156 : : but some BIOSes seem to set it. */ 157 [ # # ]: 0 : if (pci_read_config_word(socket->dev, TOPIC_PCI_CFG_PPBCN, &ppbcn) == 0 158 [ # # ]: 0 : && socket->dev->revision <= 7 159 [ # # ]: 0 : && (ppbcn & TOPIC_PCI_CFG_PPBCN_WBEN)) { 160 : 0 : ppbcn &= ~TOPIC_PCI_CFG_PPBCN_WBEN; 161 : 0 : pci_write_config_word(socket->dev, TOPIC_PCI_CFG_PPBCN, ppbcn); 162 : 0 : dev_info(&socket->dev->dev, "Disabled ToPIC95 Cardbus write buffers.\n"); 163 : : } 164 : : 165 : 0 : return 0; 166 : : } 167 : : 168 : : #endif /* _LINUX_TOPIC_H */