LCOV - code coverage report

Current view: top level - drivers/pci - pci.c (source / functions) Hit Total Coverage Test: combined.info Lines: 410 2272 18.0 % Date: 2022-03-28 16:04:14 Functions: 57 231 24.7 % Branches: 172 1713 10.0 %

Function Name	Hit count
__pci_bus_find_cap_start	923
__pci_dev_set_current_state	0
__pci_enable_wake	0
__pci_find_next_cap_ttl	130
__pci_find_next_ht_cap	0
__pci_pme_active	0
__pci_request_region	143
__pci_request_selected_regions	13
__pci_reset_bus	0
__pci_reset_function_locked	0
__pci_reset_slot	0
__pci_set_master	39
__pcie_print_link_status	0
_pci_add_cap_save_buffer	273
devm_pci_remap_cfg_resource	0
devm_pci_remap_cfgspace	0
devm_pci_remap_iospace	0
devm_pci_unmap_iospace	0
do_pci_disable_device	26
do_pci_enable_device	52
get_pci_dr	26
pci_acs_enabled	0
pci_acs_flags_enabled	0
pci_acs_path_enabled	0
pci_add_cap_save_buffer	0
pci_add_dma_alias	0
pci_add_ext_cap_save_buffer	0
pci_address_to_pio	0
pci_af_flr	91
pci_allocate_cap_save_buffers	91
pci_ats_disabled	91
pci_back_from_sleep	0
pci_bridge_d3_possible	13
pci_bridge_d3_update	91
pci_bridge_secondary_bus_reset	0
pci_bridge_wait_for_secondary_bus	0
pci_bus_error_reset	0
pci_bus_find_capability	0
pci_bus_lock	0
pci_bus_max_busnr	0
pci_bus_reset	0
pci_bus_resetable	0
pci_bus_restore_locked	0
pci_bus_save_and_disable_locked	0
pci_bus_set_current_state	0
pci_bus_trylock	0
pci_bus_unlock	0
pci_check_and_mask_intx	0
pci_check_and_set_intx_mask	0
pci_check_and_unmask_intx	0
pci_check_pme_status	0
pci_choose_state	0
pci_clear_master	13
pci_clear_mwi	0
pci_common_swizzle	0
pci_config_pm_runtime_get	0
pci_config_pm_runtime_put	0
pci_configure_ari	91
pci_d3cold_disable	0
pci_d3cold_enable	0
pci_dev_adjust_pme	0
pci_dev_check_d3cold	0
pci_dev_complete_resume	0
pci_dev_need_resume	0
pci_dev_reset_slot_function	78
pci_dev_restore	0
pci_dev_run_wake	0
pci_dev_save_and_disable	0
pci_dev_str_match	0
pci_dev_str_match_path	0
pci_dev_trylock	0
pci_dev_wait	0
pci_device_is_present	0
pci_devs_are_dma_aliases	0
pci_disable_acs_redir	91
pci_disable_device	26
pci_disable_enabled_device	0
pci_ea_init	91
pci_ea_read	0
pci_enable_acs	91
pci_enable_atomic_ops_to_root	0
pci_enable_bridge	0
pci_enable_device	26
pci_enable_device_flags	52
pci_enable_device_io	0
pci_enable_device_mem	0
pci_enable_wake	0
pci_ext_cfg_avail	0
pci_find_capability	923
pci_find_ext_capability	676
pci_find_ht_capability	0
pci_find_next_capability	0
pci_find_next_ext_capability	858
pci_find_next_ht_capability	0
pci_find_parent_resource	182
pci_find_pcie_root_port	0
pci_find_resource	0
pci_find_saved_cap	0
pci_find_saved_ext_cap	0
pci_finish_runtime_suspend	0
pci_fixup_cardbus	0
pci_free_cap_save_buffers	0
pci_get_interrupt_pin	0
pci_ignore_hotplug	0
pci_intx	0
pci_ioremap_bar	13
pci_ioremap_wc_bar	0
pci_load_and_free_saved_state	0
pci_load_saved_state	0
pci_parent_bus_reset	78
pci_pio_to_address	0
pci_platform_power_transition	26
pci_pm_init	91
pci_pm_reset	91
pci_pme_active	0
pci_pme_capable	0
pci_pme_list_scan	0
pci_pme_restore	0
pci_pme_wakeup	0
pci_pme_wakeup_bus	0
pci_power_up	26
pci_pr3_present	0
pci_prepare_to_sleep	0
pci_probe_reset_bus	0
pci_probe_reset_function	91
pci_probe_reset_slot	0
pci_raw_set_power_state	26
pci_real_dma_dev	91
pci_realloc_setup_params	13
pci_reassigndev_resource_alignment	91
pci_rebar_find_pos	0
pci_rebar_get_current_size	0
pci_rebar_get_possible_sizes	0
pci_rebar_set_size	0
pci_reenable_device	0
pci_refresh_power_state	0
pci_register_io_range	0
pci_register_set_vga_state	0
pci_release_region	78
pci_release_regions	13
pci_release_selected_regions	0
pci_remap_iospace	0
pci_request_acs	0
pci_request_region	65
pci_request_regions	13
pci_request_regions_exclusive	0
pci_request_resource_alignment	0
pci_request_selected_regions	0
pci_request_selected_regions_exclusive	0
pci_reset_bus	0
pci_reset_function	0
pci_reset_function_locked	0
pci_reset_hotplug_slot	13
pci_reset_secondary_bus	0
pci_resource_alignment_sysfs_init	13
pci_resource_to_user	0
pci_restore_config_dword	0
pci_restore_config_space	0
pci_restore_ltr_state	0
pci_restore_pcie_state	0
pci_restore_pcix_state	0
pci_restore_rebar_state	0
pci_restore_state	0
pci_save_ltr_state	13
pci_save_pcie_state	13
pci_save_pcix_state	13
pci_save_state	13
pci_select_bars	0
pci_set_cacheline_size	0
pci_set_master	26
pci_set_mwi	0
pci_set_pcie_reset_state	0
pci_set_platform_pm	13
pci_set_power_state	52
pci_set_vga_state	0
pci_setup	0
pci_slot_lock	0
pci_slot_reset	0
pci_slot_resetable	0
pci_slot_restore_locked	0
pci_slot_save_and_disable_locked	0
pci_slot_trylock	0
pci_slot_unlock	0
pci_specified_resource_alignment	91
pci_std_enable_acs	0
pci_store_saved_state	0
pci_swizzle_interrupt_pin	0
pci_target_state	0
pci_try_reset_function	0
pci_try_set_mwi	0
pci_unmap_iospace	0
pci_update_current_state	0
pci_wait_for_pending	0
pci_wait_for_pending_transaction	0
pci_wake_from_d3	0
pci_wakeup	0
pci_wakeup_bus	0
pcibios_add_device	0
pcibios_default_alignment	91
pcibios_disable_device	0
pcibios_enable_device	0
pcibios_penalize_isa_irq	0
pcibios_release_device	0
pcibios_reset_secondary_bus	0
pcibios_set_master	26
pcibios_set_pcie_reset_state	0
pcibios_setup	0
pcie_bandwidth_available	0
pcie_bandwidth_capable	0
pcie_clear_root_pme_status	0
pcie_flr	0
pcie_get_mps	0
pcie_get_readrq	0
pcie_get_speed_cap	0
pcie_get_width_cap	0
pcie_has_flr	91
pcie_port_pm_setup	0
pcie_print_link_status	0
pcie_set_mps	0
pcie_set_readrq	0
pcie_wait_for_link	0
pcie_wait_for_link_delay	0
pcim_enable_device	26
pcim_pin_device	0
pcim_release	13
pcim_set_mwi	0
pcix_get_max_mmrbc	0
pcix_get_mmrbc	0
pcix_set_mmrbc	0
resource_alignment_show	0
resource_alignment_store	0

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