Branch data Line data Source code
1 : : // SPDX-License-Identifier: GPL-2.0
2 : : /*
3 : : * xHCI host controller driver
4 : : *
5 : : * Copyright (C) 2008 Intel Corp.
6 : : *
7 : : * Author: Sarah Sharp
8 : : * Some code borrowed from the Linux EHCI driver.
9 : : */
10 : :
11 : : #include <linux/usb.h>
12 : : #include <linux/pci.h>
13 : : #include <linux/slab.h>
14 : : #include <linux/dmapool.h>
15 : : #include <linux/dma-mapping.h>
16 : :
17 : : #include "xhci.h"
18 : : #include "xhci-trace.h"
19 : : #include "xhci-debugfs.h"
20 : :
21 : : /*
22 : : * Allocates a generic ring segment from the ring pool, sets the dma address,
23 : : * initializes the segment to zero, and sets the private next pointer to NULL.
24 : : *
25 : : * Section 4.11.1.1:
26 : : * "All components of all Command and Transfer TRBs shall be initialized to '0'"
27 : : */
28 : 0 : static struct xhci_segment *xhci_segment_alloc(struct xhci_hcd *xhci,
29 : : unsigned int cycle_state,
30 : : unsigned int max_packet,
31 : : gfp_t flags)
32 : : {
33 : 0 : struct xhci_segment *seg;
34 : 0 : dma_addr_t dma;
35 : 0 : int i;
36 : 0 : struct device *dev = xhci_to_hcd(xhci)->self.sysdev;
37 : :
38 : 0 : seg = kzalloc_node(sizeof(*seg), flags, dev_to_node(dev));
39 [ # # ]: 0 : if (!seg)
40 : : return NULL;
41 : :
42 : 0 : seg->trbs = dma_pool_zalloc(xhci->segment_pool, flags, &dma);
43 [ # # ]: 0 : if (!seg->trbs) {
44 : 0 : kfree(seg);
45 : 0 : return NULL;
46 : : }
47 : :
48 [ # # ]: 0 : if (max_packet) {
49 : 0 : seg->bounce_buf = kzalloc_node(max_packet, flags,
50 : : dev_to_node(dev));
51 [ # # ]: 0 : if (!seg->bounce_buf) {
52 : 0 : dma_pool_free(xhci->segment_pool, seg->trbs, dma);
53 : 0 : kfree(seg);
54 : 0 : return NULL;
55 : : }
56 : : }
57 : : /* If the cycle state is 0, set the cycle bit to 1 for all the TRBs */
58 [ # # ]: 0 : if (cycle_state == 0) {
59 [ # # ]: 0 : for (i = 0; i < TRBS_PER_SEGMENT; i++)
60 : 0 : seg->trbs[i].link.control |= cpu_to_le32(TRB_CYCLE);
61 : : }
62 : 0 : seg->dma = dma;
63 : 0 : seg->next = NULL;
64 : :
65 : 0 : return seg;
66 : : }
67 : :
68 : : static void xhci_segment_free(struct xhci_hcd *xhci, struct xhci_segment *seg)
69 : : {
70 : : if (seg->trbs) {
71 : : dma_pool_free(xhci->segment_pool, seg->trbs, seg->dma);
72 : : seg->trbs = NULL;
73 : : }
74 : : kfree(seg->bounce_buf);
75 : : kfree(seg);
76 : : }
77 : :
78 : 0 : static void xhci_free_segments_for_ring(struct xhci_hcd *xhci,
79 : : struct xhci_segment *first)
80 : : {
81 : 0 : struct xhci_segment *seg;
82 : :
83 : 0 : seg = first->next;
84 [ # # ]: 0 : while (seg != first) {
85 : 0 : struct xhci_segment *next = seg->next;
86 : 0 : xhci_segment_free(xhci, seg);
87 : 0 : seg = next;
88 : : }
89 : 0 : xhci_segment_free(xhci, first);
90 : 0 : }
91 : :
92 : : /*
93 : : * Make the prev segment point to the next segment.
94 : : *
95 : : * Change the last TRB in the prev segment to be a Link TRB which points to the
96 : : * DMA address of the next segment. The caller needs to set any Link TRB
97 : : * related flags, such as End TRB, Toggle Cycle, and no snoop.
98 : : */
99 : 0 : static void xhci_link_segments(struct xhci_hcd *xhci, struct xhci_segment *prev,
100 : : struct xhci_segment *next, enum xhci_ring_type type)
101 : : {
102 : 0 : u32 val;
103 : :
104 [ # # ]: 0 : if (!prev || !next)
105 : : return;
106 : 0 : prev->next = next;
107 [ # # ]: 0 : if (type != TYPE_EVENT) {
108 : 0 : prev->trbs[TRBS_PER_SEGMENT-1].link.segment_ptr =
109 : 0 : cpu_to_le64(next->dma);
110 : :
111 : : /* Set the last TRB in the segment to have a TRB type ID of Link TRB */
112 : 0 : val = le32_to_cpu(prev->trbs[TRBS_PER_SEGMENT-1].link.control);
113 : 0 : val &= ~TRB_TYPE_BITMASK;
114 : 0 : val |= TRB_TYPE(TRB_LINK);
115 : : /* Always set the chain bit with 0.95 hardware */
116 : : /* Set chain bit for isoc rings on AMD 0.96 host */
117 [ # # # # ]: 0 : if (xhci_link_trb_quirk(xhci) ||
118 : 0 : (type == TYPE_ISOC &&
119 [ # # ]: 0 : (xhci->quirks & XHCI_AMD_0x96_HOST)))
120 : 0 : val |= TRB_CHAIN;
121 : 0 : prev->trbs[TRBS_PER_SEGMENT-1].link.control = cpu_to_le32(val);
122 : : }
123 : : }
124 : :
125 : : /*
126 : : * Link the ring to the new segments.
127 : : * Set Toggle Cycle for the new ring if needed.
128 : : */
129 : 0 : static void xhci_link_rings(struct xhci_hcd *xhci, struct xhci_ring *ring,
130 : : struct xhci_segment *first, struct xhci_segment *last,
131 : : unsigned int num_segs)
132 : : {
133 : 0 : struct xhci_segment *next;
134 : :
135 [ # # # # ]: 0 : if (!ring || !first || !last)
136 : : return;
137 : :
138 : 0 : next = ring->enq_seg->next;
139 : 0 : xhci_link_segments(xhci, ring->enq_seg, first, ring->type);
140 : 0 : xhci_link_segments(xhci, last, next, ring->type);
141 : 0 : ring->num_segs += num_segs;
142 : 0 : ring->num_trbs_free += (TRBS_PER_SEGMENT - 1) * num_segs;
143 : :
144 [ # # # # ]: 0 : if (ring->type != TYPE_EVENT && ring->enq_seg == ring->last_seg) {
145 : 0 : ring->last_seg->trbs[TRBS_PER_SEGMENT-1].link.control
146 : 0 : &= ~cpu_to_le32(LINK_TOGGLE);
147 : 0 : last->trbs[TRBS_PER_SEGMENT-1].link.control
148 : 0 : |= cpu_to_le32(LINK_TOGGLE);
149 : 0 : ring->last_seg = last;
150 : : }
151 : : }
152 : :
153 : : /*
154 : : * We need a radix tree for mapping physical addresses of TRBs to which stream
155 : : * ID they belong to. We need to do this because the host controller won't tell
156 : : * us which stream ring the TRB came from. We could store the stream ID in an
157 : : * event data TRB, but that doesn't help us for the cancellation case, since the
158 : : * endpoint may stop before it reaches that event data TRB.
159 : : *
160 : : * The radix tree maps the upper portion of the TRB DMA address to a ring
161 : : * segment that has the same upper portion of DMA addresses. For example, say I
162 : : * have segments of size 1KB, that are always 1KB aligned. A segment may
163 : : * start at 0x10c91000 and end at 0x10c913f0. If I use the upper 10 bits, the
164 : : * key to the stream ID is 0x43244. I can use the DMA address of the TRB to
165 : : * pass the radix tree a key to get the right stream ID:
166 : : *
167 : : * 0x10c90fff >> 10 = 0x43243
168 : : * 0x10c912c0 >> 10 = 0x43244
169 : : * 0x10c91400 >> 10 = 0x43245
170 : : *
171 : : * Obviously, only those TRBs with DMA addresses that are within the segment
172 : : * will make the radix tree return the stream ID for that ring.
173 : : *
174 : : * Caveats for the radix tree:
175 : : *
176 : : * The radix tree uses an unsigned long as a key pair. On 32-bit systems, an
177 : : * unsigned long will be 32-bits; on a 64-bit system an unsigned long will be
178 : : * 64-bits. Since we only request 32-bit DMA addresses, we can use that as the
179 : : * key on 32-bit or 64-bit systems (it would also be fine if we asked for 64-bit
180 : : * PCI DMA addresses on a 64-bit system). There might be a problem on 32-bit
181 : : * extended systems (where the DMA address can be bigger than 32-bits),
182 : : * if we allow the PCI dma mask to be bigger than 32-bits. So don't do that.
183 : : */
184 : : static int xhci_insert_segment_mapping(struct radix_tree_root *trb_address_map,
185 : : struct xhci_ring *ring,
186 : : struct xhci_segment *seg,
187 : : gfp_t mem_flags)
188 : : {
189 : : unsigned long key;
190 : : int ret;
191 : :
192 : : key = (unsigned long)(seg->dma >> TRB_SEGMENT_SHIFT);
193 : : /* Skip any segments that were already added. */
194 : : if (radix_tree_lookup(trb_address_map, key))
195 : : return 0;
196 : :
197 : : ret = radix_tree_maybe_preload(mem_flags);
198 : : if (ret)
199 : : return ret;
200 : : ret = radix_tree_insert(trb_address_map,
201 : : key, ring);
202 : : radix_tree_preload_end();
203 : : return ret;
204 : : }
205 : :
206 : : static void xhci_remove_segment_mapping(struct radix_tree_root *trb_address_map,
207 : : struct xhci_segment *seg)
208 : : {
209 : : unsigned long key;
210 : :
211 : : key = (unsigned long)(seg->dma >> TRB_SEGMENT_SHIFT);
212 : : if (radix_tree_lookup(trb_address_map, key))
213 : : radix_tree_delete(trb_address_map, key);
214 : : }
215 : :
216 : 0 : static int xhci_update_stream_segment_mapping(
217 : : struct radix_tree_root *trb_address_map,
218 : : struct xhci_ring *ring,
219 : : struct xhci_segment *first_seg,
220 : : struct xhci_segment *last_seg,
221 : : gfp_t mem_flags)
222 : : {
223 : 0 : struct xhci_segment *seg;
224 : 0 : struct xhci_segment *failed_seg;
225 : 0 : int ret;
226 : :
227 [ # # # # ]: 0 : if (WARN_ON_ONCE(trb_address_map == NULL))
228 : : return 0;
229 : :
230 : : seg = first_seg;
231 : 0 : do {
232 : 0 : ret = xhci_insert_segment_mapping(trb_address_map,
233 : : ring, seg, mem_flags);
234 [ # # ]: 0 : if (ret)
235 : 0 : goto remove_streams;
236 [ # # ]: 0 : if (seg == last_seg)
237 : : return 0;
238 : 0 : seg = seg->next;
239 [ # # ]: 0 : } while (seg != first_seg);
240 : :
241 : : return 0;
242 : :
243 : : remove_streams:
244 : 0 : failed_seg = seg;
245 : 0 : seg = first_seg;
246 : 0 : do {
247 : 0 : xhci_remove_segment_mapping(trb_address_map, seg);
248 [ # # ]: 0 : if (seg == failed_seg)
249 : : return ret;
250 : 0 : seg = seg->next;
251 [ # # ]: 0 : } while (seg != first_seg);
252 : :
253 : : return ret;
254 : : }
255 : :
256 : : static void xhci_remove_stream_mapping(struct xhci_ring *ring)
257 : : {
258 : : struct xhci_segment *seg;
259 : :
260 : : if (WARN_ON_ONCE(ring->trb_address_map == NULL))
261 : : return;
262 : :
263 : : seg = ring->first_seg;
264 : : do {
265 : : xhci_remove_segment_mapping(ring->trb_address_map, seg);
266 : : seg = seg->next;
267 : : } while (seg != ring->first_seg);
268 : : }
269 : :
270 : 0 : static int xhci_update_stream_mapping(struct xhci_ring *ring, gfp_t mem_flags)
271 : : {
272 : 0 : return xhci_update_stream_segment_mapping(ring->trb_address_map, ring,
273 : : ring->first_seg, ring->last_seg, mem_flags);
274 : : }
275 : :
276 : : /* XXX: Do we need the hcd structure in all these functions? */
277 : 0 : void xhci_ring_free(struct xhci_hcd *xhci, struct xhci_ring *ring)
278 : : {
279 [ # # ]: 0 : if (!ring)
280 : : return;
281 : :
282 : 0 : trace_xhci_ring_free(ring);
283 : :
284 [ # # ]: 0 : if (ring->first_seg) {
285 [ # # ]: 0 : if (ring->type == TYPE_STREAM)
286 : 0 : xhci_remove_stream_mapping(ring);
287 : 0 : xhci_free_segments_for_ring(xhci, ring->first_seg);
288 : : }
289 : :
290 : 0 : kfree(ring);
291 : : }
292 : :
293 : 0 : static void xhci_initialize_ring_info(struct xhci_ring *ring,
294 : : unsigned int cycle_state)
295 : : {
296 : : /* The ring is empty, so the enqueue pointer == dequeue pointer */
297 : 0 : ring->enqueue = ring->first_seg->trbs;
298 : 0 : ring->enq_seg = ring->first_seg;
299 : 0 : ring->dequeue = ring->enqueue;
300 : 0 : ring->deq_seg = ring->first_seg;
301 : : /* The ring is initialized to 0. The producer must write 1 to the cycle
302 : : * bit to handover ownership of the TRB, so PCS = 1. The consumer must
303 : : * compare CCS to the cycle bit to check ownership, so CCS = 1.
304 : : *
305 : : * New rings are initialized with cycle state equal to 1; if we are
306 : : * handling ring expansion, set the cycle state equal to the old ring.
307 : : */
308 : 0 : ring->cycle_state = cycle_state;
309 : :
310 : : /*
311 : : * Each segment has a link TRB, and leave an extra TRB for SW
312 : : * accounting purpose
313 : : */
314 : 0 : ring->num_trbs_free = ring->num_segs * (TRBS_PER_SEGMENT - 1) - 1;
315 : : }
316 : :
317 : : /* Allocate segments and link them for a ring */
318 : 0 : static int xhci_alloc_segments_for_ring(struct xhci_hcd *xhci,
319 : : struct xhci_segment **first, struct xhci_segment **last,
320 : : unsigned int num_segs, unsigned int cycle_state,
321 : : enum xhci_ring_type type, unsigned int max_packet, gfp_t flags)
322 : : {
323 : 0 : struct xhci_segment *prev;
324 : :
325 : 0 : prev = xhci_segment_alloc(xhci, cycle_state, max_packet, flags);
326 [ # # ]: 0 : if (!prev)
327 : : return -ENOMEM;
328 : 0 : num_segs--;
329 : :
330 : 0 : *first = prev;
331 [ # # ]: 0 : while (num_segs > 0) {
332 : 0 : struct xhci_segment *next;
333 : :
334 : 0 : next = xhci_segment_alloc(xhci, cycle_state, max_packet, flags);
335 [ # # ]: 0 : if (!next) {
336 : 0 : prev = *first;
337 [ # # ]: 0 : while (prev) {
338 : 0 : next = prev->next;
339 : 0 : xhci_segment_free(xhci, prev);
340 : 0 : prev = next;
341 : : }
342 : : return -ENOMEM;
343 : : }
344 : 0 : xhci_link_segments(xhci, prev, next, type);
345 : :
346 : 0 : prev = next;
347 : 0 : num_segs--;
348 : : }
349 : 0 : xhci_link_segments(xhci, prev, *first, type);
350 : 0 : *last = prev;
351 : :
352 : 0 : return 0;
353 : : }
354 : :
355 : : /**
356 : : * Create a new ring with zero or more segments.
357 : : *
358 : : * Link each segment together into a ring.
359 : : * Set the end flag and the cycle toggle bit on the last segment.
360 : : * See section 4.9.1 and figures 15 and 16.
361 : : */
362 : 0 : struct xhci_ring *xhci_ring_alloc(struct xhci_hcd *xhci,
363 : : unsigned int num_segs, unsigned int cycle_state,
364 : : enum xhci_ring_type type, unsigned int max_packet, gfp_t flags)
365 : : {
366 : 0 : struct xhci_ring *ring;
367 : 0 : int ret;
368 : 0 : struct device *dev = xhci_to_hcd(xhci)->self.sysdev;
369 : :
370 : 0 : ring = kzalloc_node(sizeof(*ring), flags, dev_to_node(dev));
371 [ # # ]: 0 : if (!ring)
372 : : return NULL;
373 : :
374 : 0 : ring->num_segs = num_segs;
375 : 0 : ring->bounce_buf_len = max_packet;
376 [ # # ]: 0 : INIT_LIST_HEAD(&ring->td_list);
377 : 0 : ring->type = type;
378 [ # # ]: 0 : if (num_segs == 0)
379 : : return ring;
380 : :
381 : 0 : ret = xhci_alloc_segments_for_ring(xhci, &ring->first_seg,
382 : : &ring->last_seg, num_segs, cycle_state, type,
383 : : max_packet, flags);
384 [ # # ]: 0 : if (ret)
385 : 0 : goto fail;
386 : :
387 : : /* Only event ring does not use link TRB */
388 [ # # ]: 0 : if (type != TYPE_EVENT) {
389 : : /* See section 4.9.2.1 and 6.4.4.1 */
390 : 0 : ring->last_seg->trbs[TRBS_PER_SEGMENT - 1].link.control |=
391 : : cpu_to_le32(LINK_TOGGLE);
392 : : }
393 : 0 : xhci_initialize_ring_info(ring, cycle_state);
394 : 0 : trace_xhci_ring_alloc(ring);
395 : 0 : return ring;
396 : :
397 : : fail:
398 : 0 : kfree(ring);
399 : 0 : return NULL;
400 : : }
401 : :
402 : 0 : void xhci_free_endpoint_ring(struct xhci_hcd *xhci,
403 : : struct xhci_virt_device *virt_dev,
404 : : unsigned int ep_index)
405 : : {
406 : 0 : xhci_ring_free(xhci, virt_dev->eps[ep_index].ring);
407 : 0 : virt_dev->eps[ep_index].ring = NULL;
408 : 0 : }
409 : :
410 : : /*
411 : : * Expand an existing ring.
412 : : * Allocate a new ring which has same segment numbers and link the two rings.
413 : : */
414 : 0 : int xhci_ring_expansion(struct xhci_hcd *xhci, struct xhci_ring *ring,
415 : : unsigned int num_trbs, gfp_t flags)
416 : : {
417 : 0 : struct xhci_segment *first;
418 : 0 : struct xhci_segment *last;
419 : 0 : unsigned int num_segs;
420 : 0 : unsigned int num_segs_needed;
421 : 0 : int ret;
422 : :
423 : 0 : num_segs_needed = (num_trbs + (TRBS_PER_SEGMENT - 1) - 1) /
424 : : (TRBS_PER_SEGMENT - 1);
425 : :
426 : : /* Allocate number of segments we needed, or double the ring size */
427 : 0 : num_segs = ring->num_segs > num_segs_needed ?
428 : : ring->num_segs : num_segs_needed;
429 : :
430 : 0 : ret = xhci_alloc_segments_for_ring(xhci, &first, &last,
431 : : num_segs, ring->cycle_state, ring->type,
432 : : ring->bounce_buf_len, flags);
433 [ # # ]: 0 : if (ret)
434 : : return -ENOMEM;
435 : :
436 [ # # ]: 0 : if (ring->type == TYPE_STREAM)
437 : 0 : ret = xhci_update_stream_segment_mapping(ring->trb_address_map,
438 : : ring, first, last, flags);
439 [ # # ]: 0 : if (ret) {
440 : 0 : struct xhci_segment *next;
441 : 0 : do {
442 : 0 : next = first->next;
443 : 0 : xhci_segment_free(xhci, first);
444 [ # # ]: 0 : if (first == last)
445 : : break;
446 : 0 : first = next;
447 : 0 : } while (true);
448 : : return ret;
449 : : }
450 : :
451 : 0 : xhci_link_rings(xhci, ring, first, last, num_segs);
452 : 0 : trace_xhci_ring_expansion(ring);
453 : 0 : xhci_dbg_trace(xhci, trace_xhci_dbg_ring_expansion,
454 : : "ring expansion succeed, now has %d segments",
455 : : ring->num_segs);
456 : :
457 : 0 : return 0;
458 : : }
459 : :
460 : 0 : struct xhci_container_ctx *xhci_alloc_container_ctx(struct xhci_hcd *xhci,
461 : : int type, gfp_t flags)
462 : : {
463 : 0 : struct xhci_container_ctx *ctx;
464 [ # # ]: 0 : struct device *dev = xhci_to_hcd(xhci)->self.sysdev;
465 : :
466 [ # # ]: 0 : if ((type != XHCI_CTX_TYPE_DEVICE) && (type != XHCI_CTX_TYPE_INPUT))
467 : : return NULL;
468 : :
469 : 0 : ctx = kzalloc_node(sizeof(*ctx), flags, dev_to_node(dev));
470 [ # # ]: 0 : if (!ctx)
471 : : return NULL;
472 : :
473 : 0 : ctx->type = type;
474 [ # # ]: 0 : ctx->size = HCC_64BYTE_CONTEXT(xhci->hcc_params) ? 2048 : 1024;
475 [ # # ]: 0 : if (type == XHCI_CTX_TYPE_INPUT)
476 [ # # ]: 0 : ctx->size += CTX_SIZE(xhci->hcc_params);
477 : :
478 : 0 : ctx->bytes = dma_pool_zalloc(xhci->device_pool, flags, &ctx->dma);
479 [ # # ]: 0 : if (!ctx->bytes) {
480 : 0 : kfree(ctx);
481 : 0 : return NULL;
482 : : }
483 : : return ctx;
484 : : }
485 : :
486 : 0 : void xhci_free_container_ctx(struct xhci_hcd *xhci,
487 : : struct xhci_container_ctx *ctx)
488 : : {
489 [ # # ]: 0 : if (!ctx)
490 : : return;
491 : 0 : dma_pool_free(xhci->device_pool, ctx->bytes, ctx->dma);
492 : 0 : kfree(ctx);
493 : : }
494 : :
495 : 0 : struct xhci_input_control_ctx *xhci_get_input_control_ctx(
496 : : struct xhci_container_ctx *ctx)
497 : : {
498 [ # # ]: 0 : if (ctx->type != XHCI_CTX_TYPE_INPUT)
499 : : return NULL;
500 : :
501 : 0 : return (struct xhci_input_control_ctx *)ctx->bytes;
502 : : }
503 : :
504 : 0 : struct xhci_slot_ctx *xhci_get_slot_ctx(struct xhci_hcd *xhci,
505 : : struct xhci_container_ctx *ctx)
506 : : {
507 [ # # ]: 0 : if (ctx->type == XHCI_CTX_TYPE_DEVICE)
508 : 0 : return (struct xhci_slot_ctx *)ctx->bytes;
509 : :
510 : 0 : return (struct xhci_slot_ctx *)
511 [ # # # # : 0 : (ctx->bytes + CTX_SIZE(xhci->hcc_params));
# # # # ]
512 : : }
513 : :
514 : 0 : struct xhci_ep_ctx *xhci_get_ep_ctx(struct xhci_hcd *xhci,
515 : : struct xhci_container_ctx *ctx,
516 : : unsigned int ep_index)
517 : : {
518 : : /* increment ep index by offset of start of ep ctx array */
519 : 0 : ep_index++;
520 [ # # ]: 0 : if (ctx->type == XHCI_CTX_TYPE_INPUT)
521 : 0 : ep_index++;
522 : :
523 : 0 : return (struct xhci_ep_ctx *)
524 [ # # # # : 0 : (ctx->bytes + (ep_index * CTX_SIZE(xhci->hcc_params)));
# # # # #
# # # #
# ]
525 : : }
526 : :
527 : :
528 : : /***************** Streams structures manipulation *************************/
529 : :
530 : 0 : static void xhci_free_stream_ctx(struct xhci_hcd *xhci,
531 : : unsigned int num_stream_ctxs,
532 : : struct xhci_stream_ctx *stream_ctx, dma_addr_t dma)
533 : : {
534 [ # # ]: 0 : struct device *dev = xhci_to_hcd(xhci)->self.sysdev;
535 : 0 : size_t size = sizeof(struct xhci_stream_ctx) * num_stream_ctxs;
536 : :
537 [ # # ]: 0 : if (size > MEDIUM_STREAM_ARRAY_SIZE)
538 : 0 : dma_free_coherent(dev, size,
539 : : stream_ctx, dma);
540 [ # # ]: 0 : else if (size <= SMALL_STREAM_ARRAY_SIZE)
541 : 0 : return dma_pool_free(xhci->small_streams_pool,
542 : : stream_ctx, dma);
543 : : else
544 : 0 : return dma_pool_free(xhci->medium_streams_pool,
545 : : stream_ctx, dma);
546 : : }
547 : :
548 : : /*
549 : : * The stream context array for each endpoint with bulk streams enabled can
550 : : * vary in size, based on:
551 : : * - how many streams the endpoint supports,
552 : : * - the maximum primary stream array size the host controller supports,
553 : : * - and how many streams the device driver asks for.
554 : : *
555 : : * The stream context array must be a power of 2, and can be as small as
556 : : * 64 bytes or as large as 1MB.
557 : : */
558 : 0 : static struct xhci_stream_ctx *xhci_alloc_stream_ctx(struct xhci_hcd *xhci,
559 : : unsigned int num_stream_ctxs, dma_addr_t *dma,
560 : : gfp_t mem_flags)
561 : : {
562 [ # # ]: 0 : struct device *dev = xhci_to_hcd(xhci)->self.sysdev;
563 : 0 : size_t size = sizeof(struct xhci_stream_ctx) * num_stream_ctxs;
564 : :
565 [ # # ]: 0 : if (size > MEDIUM_STREAM_ARRAY_SIZE)
566 : 0 : return dma_alloc_coherent(dev, size,
567 : : dma, mem_flags);
568 [ # # ]: 0 : else if (size <= SMALL_STREAM_ARRAY_SIZE)
569 : 0 : return dma_pool_alloc(xhci->small_streams_pool,
570 : : mem_flags, dma);
571 : : else
572 : 0 : return dma_pool_alloc(xhci->medium_streams_pool,
573 : : mem_flags, dma);
574 : : }
575 : :
576 : 0 : struct xhci_ring *xhci_dma_to_transfer_ring(
577 : : struct xhci_virt_ep *ep,
578 : : u64 address)
579 : : {
580 [ # # ]: 0 : if (ep->ep_state & EP_HAS_STREAMS)
581 : 0 : return radix_tree_lookup(&ep->stream_info->trb_address_map,
582 : 0 : address >> TRB_SEGMENT_SHIFT);
583 : 0 : return ep->ring;
584 : : }
585 : :
586 : 0 : struct xhci_ring *xhci_stream_id_to_ring(
587 : : struct xhci_virt_device *dev,
588 : : unsigned int ep_index,
589 : : unsigned int stream_id)
590 : : {
591 : 0 : struct xhci_virt_ep *ep = &dev->eps[ep_index];
592 : :
593 [ # # ]: 0 : if (stream_id == 0)
594 : 0 : return ep->ring;
595 [ # # ]: 0 : if (!ep->stream_info)
596 : : return NULL;
597 : :
598 [ # # ]: 0 : if (stream_id >= ep->stream_info->num_streams)
599 : : return NULL;
600 : 0 : return ep->stream_info->stream_rings[stream_id];
601 : : }
602 : :
603 : : /*
604 : : * Change an endpoint's internal structure so it supports stream IDs. The
605 : : * number of requested streams includes stream 0, which cannot be used by device
606 : : * drivers.
607 : : *
608 : : * The number of stream contexts in the stream context array may be bigger than
609 : : * the number of streams the driver wants to use. This is because the number of
610 : : * stream context array entries must be a power of two.
611 : : */
612 : 0 : struct xhci_stream_info *xhci_alloc_stream_info(struct xhci_hcd *xhci,
613 : : unsigned int num_stream_ctxs,
614 : : unsigned int num_streams,
615 : : unsigned int max_packet, gfp_t mem_flags)
616 : : {
617 : 0 : struct xhci_stream_info *stream_info;
618 : 0 : u32 cur_stream;
619 : 0 : struct xhci_ring *cur_ring;
620 : 0 : u64 addr;
621 : 0 : int ret;
622 [ # # ]: 0 : struct device *dev = xhci_to_hcd(xhci)->self.sysdev;
623 : :
624 : 0 : xhci_dbg(xhci, "Allocating %u streams and %u "
625 : : "stream context array entries.\n",
626 : : num_streams, num_stream_ctxs);
627 [ # # ]: 0 : if (xhci->cmd_ring_reserved_trbs == MAX_RSVD_CMD_TRBS) {
628 : : xhci_dbg(xhci, "Command ring has no reserved TRBs available\n");
629 : : return NULL;
630 : : }
631 : 0 : xhci->cmd_ring_reserved_trbs++;
632 : :
633 : 0 : stream_info = kzalloc_node(sizeof(*stream_info), mem_flags,
634 : : dev_to_node(dev));
635 [ # # ]: 0 : if (!stream_info)
636 : 0 : goto cleanup_trbs;
637 : :
638 : 0 : stream_info->num_streams = num_streams;
639 : 0 : stream_info->num_stream_ctxs = num_stream_ctxs;
640 : :
641 : : /* Initialize the array of virtual pointers to stream rings. */
642 : 0 : stream_info->stream_rings = kcalloc_node(
643 : : num_streams, sizeof(struct xhci_ring *), mem_flags,
644 : : dev_to_node(dev));
645 [ # # ]: 0 : if (!stream_info->stream_rings)
646 : 0 : goto cleanup_info;
647 : :
648 : : /* Initialize the array of DMA addresses for stream rings for the HW. */
649 : 0 : stream_info->stream_ctx_array = xhci_alloc_stream_ctx(xhci,
650 : : num_stream_ctxs, &stream_info->ctx_array_dma,
651 : : mem_flags);
652 [ # # ]: 0 : if (!stream_info->stream_ctx_array)
653 : 0 : goto cleanup_ctx;
654 : 0 : memset(stream_info->stream_ctx_array, 0,
655 : : sizeof(struct xhci_stream_ctx)*num_stream_ctxs);
656 : :
657 : : /* Allocate everything needed to free the stream rings later */
658 : 0 : stream_info->free_streams_command =
659 : 0 : xhci_alloc_command_with_ctx(xhci, true, mem_flags);
660 [ # # ]: 0 : if (!stream_info->free_streams_command)
661 : 0 : goto cleanup_ctx;
662 : :
663 : 0 : INIT_RADIX_TREE(&stream_info->trb_address_map, GFP_ATOMIC);
664 : :
665 : : /* Allocate rings for all the streams that the driver will use,
666 : : * and add their segment DMA addresses to the radix tree.
667 : : * Stream 0 is reserved.
668 : : */
669 : :
670 [ # # ]: 0 : for (cur_stream = 1; cur_stream < num_streams; cur_stream++) {
671 : 0 : stream_info->stream_rings[cur_stream] =
672 : 0 : xhci_ring_alloc(xhci, 2, 1, TYPE_STREAM, max_packet,
673 : : mem_flags);
674 : 0 : cur_ring = stream_info->stream_rings[cur_stream];
675 [ # # ]: 0 : if (!cur_ring)
676 : 0 : goto cleanup_rings;
677 : 0 : cur_ring->stream_id = cur_stream;
678 : 0 : cur_ring->trb_address_map = &stream_info->trb_address_map;
679 : : /* Set deq ptr, cycle bit, and stream context type */
680 : 0 : addr = cur_ring->first_seg->dma |
681 : 0 : SCT_FOR_CTX(SCT_PRI_TR) |
682 : 0 : cur_ring->cycle_state;
683 : 0 : stream_info->stream_ctx_array[cur_stream].stream_ring =
684 : : cpu_to_le64(addr);
685 : 0 : xhci_dbg(xhci, "Setting stream %d ring ptr to 0x%08llx\n",
686 : : cur_stream, (unsigned long long) addr);
687 : :
688 : 0 : ret = xhci_update_stream_mapping(cur_ring, mem_flags);
689 [ # # ]: 0 : if (ret) {
690 : 0 : xhci_ring_free(xhci, cur_ring);
691 : 0 : stream_info->stream_rings[cur_stream] = NULL;
692 : 0 : goto cleanup_rings;
693 : : }
694 : : }
695 : : /* Leave the other unused stream ring pointers in the stream context
696 : : * array initialized to zero. This will cause the xHC to give us an
697 : : * error if the device asks for a stream ID we don't have setup (if it
698 : : * was any other way, the host controller would assume the ring is
699 : : * "empty" and wait forever for data to be queued to that stream ID).
700 : : */
701 : :
702 : : return stream_info;
703 : :
704 : : cleanup_rings:
705 [ # # ]: 0 : for (cur_stream = 1; cur_stream < num_streams; cur_stream++) {
706 : 0 : cur_ring = stream_info->stream_rings[cur_stream];
707 [ # # ]: 0 : if (cur_ring) {
708 : 0 : xhci_ring_free(xhci, cur_ring);
709 : 0 : stream_info->stream_rings[cur_stream] = NULL;
710 : : }
711 : : }
712 : 0 : xhci_free_command(xhci, stream_info->free_streams_command);
713 : 0 : cleanup_ctx:
714 : 0 : kfree(stream_info->stream_rings);
715 : 0 : cleanup_info:
716 : 0 : kfree(stream_info);
717 : 0 : cleanup_trbs:
718 : 0 : xhci->cmd_ring_reserved_trbs--;
719 : 0 : return NULL;
720 : : }
721 : : /*
722 : : * Sets the MaxPStreams field and the Linear Stream Array field.
723 : : * Sets the dequeue pointer to the stream context array.
724 : : */
725 : 0 : void xhci_setup_streams_ep_input_ctx(struct xhci_hcd *xhci,
726 : : struct xhci_ep_ctx *ep_ctx,
727 : : struct xhci_stream_info *stream_info)
728 : : {
729 : 0 : u32 max_primary_streams;
730 : : /* MaxPStreams is the number of stream context array entries, not the
731 : : * number we're actually using. Must be in 2^(MaxPstreams + 1) format.
732 : : * fls(0) = 0, fls(0x1) = 1, fls(0x10) = 2, fls(0x100) = 3, etc.
733 : : */
734 : 0 : max_primary_streams = fls(stream_info->num_stream_ctxs) - 2;
735 : 0 : xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
736 : : "Setting number of stream ctx array entries to %u",
737 : : 1 << (max_primary_streams + 1));
738 : 0 : ep_ctx->ep_info &= cpu_to_le32(~EP_MAXPSTREAMS_MASK);
739 : 0 : ep_ctx->ep_info |= cpu_to_le32(EP_MAXPSTREAMS(max_primary_streams)
740 : : | EP_HAS_LSA);
741 : 0 : ep_ctx->deq = cpu_to_le64(stream_info->ctx_array_dma);
742 : 0 : }
743 : :
744 : : /*
745 : : * Sets the MaxPStreams field and the Linear Stream Array field to 0.
746 : : * Reinstalls the "normal" endpoint ring (at its previous dequeue mark,
747 : : * not at the beginning of the ring).
748 : : */
749 : 0 : void xhci_setup_no_streams_ep_input_ctx(struct xhci_ep_ctx *ep_ctx,
750 : : struct xhci_virt_ep *ep)
751 : : {
752 : 0 : dma_addr_t addr;
753 : 0 : ep_ctx->ep_info &= cpu_to_le32(~(EP_MAXPSTREAMS_MASK | EP_HAS_LSA));
754 : 0 : addr = xhci_trb_virt_to_dma(ep->ring->deq_seg, ep->ring->dequeue);
755 : 0 : ep_ctx->deq = cpu_to_le64(addr | ep->ring->cycle_state);
756 : 0 : }
757 : :
758 : : /* Frees all stream contexts associated with the endpoint,
759 : : *
760 : : * Caller should fix the endpoint context streams fields.
761 : : */
762 : 0 : void xhci_free_stream_info(struct xhci_hcd *xhci,
763 : : struct xhci_stream_info *stream_info)
764 : : {
765 : 0 : int cur_stream;
766 : 0 : struct xhci_ring *cur_ring;
767 : :
768 [ # # ]: 0 : if (!stream_info)
769 : : return;
770 : :
771 [ # # ]: 0 : for (cur_stream = 1; cur_stream < stream_info->num_streams;
772 : 0 : cur_stream++) {
773 : 0 : cur_ring = stream_info->stream_rings[cur_stream];
774 [ # # ]: 0 : if (cur_ring) {
775 : 0 : xhci_ring_free(xhci, cur_ring);
776 : 0 : stream_info->stream_rings[cur_stream] = NULL;
777 : : }
778 : : }
779 : 0 : xhci_free_command(xhci, stream_info->free_streams_command);
780 : 0 : xhci->cmd_ring_reserved_trbs--;
781 [ # # ]: 0 : if (stream_info->stream_ctx_array)
782 : 0 : xhci_free_stream_ctx(xhci,
783 : : stream_info->num_stream_ctxs,
784 : : stream_info->stream_ctx_array,
785 : : stream_info->ctx_array_dma);
786 : :
787 : 0 : kfree(stream_info->stream_rings);
788 : 0 : kfree(stream_info);
789 : : }
790 : :
791 : :
792 : : /***************** Device context manipulation *************************/
793 : :
794 : 0 : static void xhci_init_endpoint_timer(struct xhci_hcd *xhci,
795 : : struct xhci_virt_ep *ep)
796 : : {
797 : 0 : timer_setup(&ep->stop_cmd_timer, xhci_stop_endpoint_command_watchdog,
798 : : 0);
799 : 0 : ep->xhci = xhci;
800 : : }
801 : :
802 : : static void xhci_free_tt_info(struct xhci_hcd *xhci,
803 : : struct xhci_virt_device *virt_dev,
804 : : int slot_id)
805 : : {
806 : : struct list_head *tt_list_head;
807 : : struct xhci_tt_bw_info *tt_info, *next;
808 : : bool slot_found = false;
809 : :
810 : : /* If the device never made it past the Set Address stage,
811 : : * it may not have the real_port set correctly.
812 : : */
813 : : if (virt_dev->real_port == 0 ||
814 : : virt_dev->real_port > HCS_MAX_PORTS(xhci->hcs_params1)) {
815 : : xhci_dbg(xhci, "Bad real port.\n");
816 : : return;
817 : : }
818 : :
819 : : tt_list_head = &(xhci->rh_bw[virt_dev->real_port - 1].tts);
820 : : list_for_each_entry_safe(tt_info, next, tt_list_head, tt_list) {
821 : : /* Multi-TT hubs will have more than one entry */
822 : : if (tt_info->slot_id == slot_id) {
823 : : slot_found = true;
824 : : list_del(&tt_info->tt_list);
825 : : kfree(tt_info);
826 : : } else if (slot_found) {
827 : : break;
828 : : }
829 : : }
830 : : }
831 : :
832 : 0 : int xhci_alloc_tt_info(struct xhci_hcd *xhci,
833 : : struct xhci_virt_device *virt_dev,
834 : : struct usb_device *hdev,
835 : : struct usb_tt *tt, gfp_t mem_flags)
836 : : {
837 : 0 : struct xhci_tt_bw_info *tt_info;
838 : 0 : unsigned int num_ports;
839 : 0 : int i, j;
840 [ # # ]: 0 : struct device *dev = xhci_to_hcd(xhci)->self.sysdev;
841 : :
842 [ # # ]: 0 : if (!tt->multi)
843 : : num_ports = 1;
844 : : else
845 : 0 : num_ports = hdev->maxchild;
846 : :
847 [ # # ]: 0 : for (i = 0; i < num_ports; i++, tt_info++) {
848 : 0 : struct xhci_interval_bw_table *bw_table;
849 : :
850 : 0 : tt_info = kzalloc_node(sizeof(*tt_info), mem_flags,
851 : : dev_to_node(dev));
852 [ # # ]: 0 : if (!tt_info)
853 : 0 : goto free_tts;
854 [ # # ]: 0 : INIT_LIST_HEAD(&tt_info->tt_list);
855 : 0 : list_add(&tt_info->tt_list,
856 [ # # ]: 0 : &xhci->rh_bw[virt_dev->real_port - 1].tts);
857 : 0 : tt_info->slot_id = virt_dev->udev->slot_id;
858 [ # # ]: 0 : if (tt->multi)
859 : 0 : tt_info->ttport = i+1;
860 : : bw_table = &tt_info->bw_table;
861 [ # # ]: 0 : for (j = 0; j < XHCI_MAX_INTERVAL; j++)
862 : 0 : INIT_LIST_HEAD(&bw_table->interval_bw[j].endpoints);
863 : : }
864 : : return 0;
865 : :
866 : : free_tts:
867 : 0 : xhci_free_tt_info(xhci, virt_dev, virt_dev->udev->slot_id);
868 : 0 : return -ENOMEM;
869 : : }
870 : :
871 : :
872 : : /* All the xhci_tds in the ring's TD list should be freed at this point.
873 : : * Should be called with xhci->lock held if there is any chance the TT lists
874 : : * will be manipulated by the configure endpoint, allocate device, or update
875 : : * hub functions while this function is removing the TT entries from the list.
876 : : */
877 : 0 : void xhci_free_virt_device(struct xhci_hcd *xhci, int slot_id)
878 : : {
879 : 0 : struct xhci_virt_device *dev;
880 : 0 : int i;
881 : 0 : int old_active_eps = 0;
882 : :
883 : : /* Slot ID 0 is reserved */
884 [ # # # # ]: 0 : if (slot_id == 0 || !xhci->devs[slot_id])
885 : : return;
886 : :
887 : 0 : dev = xhci->devs[slot_id];
888 : :
889 : 0 : xhci->dcbaa->dev_context_ptrs[slot_id] = 0;
890 : 0 : if (!dev)
891 : : return;
892 : :
893 : 0 : trace_xhci_free_virt_device(dev);
894 : :
895 [ # # ]: 0 : if (dev->tt_info)
896 : 0 : old_active_eps = dev->tt_info->active_eps;
897 : :
898 [ # # ]: 0 : for (i = 0; i < 31; i++) {
899 [ # # ]: 0 : if (dev->eps[i].ring)
900 : 0 : xhci_ring_free(xhci, dev->eps[i].ring);
901 [ # # ]: 0 : if (dev->eps[i].stream_info)
902 : 0 : xhci_free_stream_info(xhci,
903 : : dev->eps[i].stream_info);
904 : : /* Endpoints on the TT/root port lists should have been removed
905 : : * when usb_disable_device() was called for the device.
906 : : * We can't drop them anyway, because the udev might have gone
907 : : * away by this point, and we can't tell what speed it was.
908 : : */
909 [ # # ]: 0 : if (!list_empty(&dev->eps[i].bw_endpoint_list))
910 : 0 : xhci_warn(xhci, "Slot %u endpoint %u "
911 : : "not removed from BW list!\n",
912 : : slot_id, i);
913 : : }
914 : : /* If this is a hub, free the TT(s) from the TT list */
915 : 0 : xhci_free_tt_info(xhci, dev, slot_id);
916 : : /* If necessary, update the number of active TTs on this root port */
917 : 0 : xhci_update_tt_active_eps(xhci, dev, old_active_eps);
918 : :
919 [ # # ]: 0 : if (dev->in_ctx)
920 : 0 : xhci_free_container_ctx(xhci, dev->in_ctx);
921 [ # # ]: 0 : if (dev->out_ctx)
922 : 0 : xhci_free_container_ctx(xhci, dev->out_ctx);
923 : :
924 [ # # # # ]: 0 : if (dev->udev && dev->udev->slot_id)
925 : 0 : dev->udev->slot_id = 0;
926 : 0 : kfree(xhci->devs[slot_id]);
927 : 0 : xhci->devs[slot_id] = NULL;
928 : : }
929 : :
930 : : /*
931 : : * Free a virt_device structure.
932 : : * If the virt_device added a tt_info (a hub) and has children pointing to
933 : : * that tt_info, then free the child first. Recursive.
934 : : * We can't rely on udev at this point to find child-parent relationships.
935 : : */
936 : 0 : static void xhci_free_virt_devices_depth_first(struct xhci_hcd *xhci, int slot_id)
937 : : {
938 : 0 : struct xhci_virt_device *vdev;
939 : 0 : struct list_head *tt_list_head;
940 : 0 : struct xhci_tt_bw_info *tt_info, *next;
941 : 0 : int i;
942 : :
943 : 0 : vdev = xhci->devs[slot_id];
944 [ # # ]: 0 : if (!vdev)
945 : : return;
946 : :
947 [ # # ]: 0 : if (vdev->real_port == 0 ||
948 [ # # ]: 0 : vdev->real_port > HCS_MAX_PORTS(xhci->hcs_params1)) {
949 : 0 : xhci_dbg(xhci, "Bad vdev->real_port.\n");
950 : 0 : goto out;
951 : : }
952 : :
953 : 0 : tt_list_head = &(xhci->rh_bw[vdev->real_port - 1].tts);
954 [ # # ]: 0 : list_for_each_entry_safe(tt_info, next, tt_list_head, tt_list) {
955 : : /* is this a hub device that added a tt_info to the tts list */
956 [ # # ]: 0 : if (tt_info->slot_id == slot_id) {
957 : : /* are any devices using this tt_info? */
958 [ # # ]: 0 : for (i = 1; i < HCS_MAX_SLOTS(xhci->hcs_params1); i++) {
959 : 0 : vdev = xhci->devs[i];
960 [ # # # # ]: 0 : if (vdev && (vdev->tt_info == tt_info))
961 : 0 : xhci_free_virt_devices_depth_first(
962 : : xhci, i);
963 : : }
964 : : }
965 : : }
966 : 0 : out:
967 : : /* we are now at a leaf device */
968 : 0 : xhci_debugfs_remove_slot(xhci, slot_id);
969 : 0 : xhci_free_virt_device(xhci, slot_id);
970 : : }
971 : :
972 : 0 : int xhci_alloc_virt_device(struct xhci_hcd *xhci, int slot_id,
973 : : struct usb_device *udev, gfp_t flags)
974 : : {
975 : 0 : struct xhci_virt_device *dev;
976 : 0 : int i;
977 : :
978 : : /* Slot ID 0 is reserved */
979 [ # # # # ]: 0 : if (slot_id == 0 || xhci->devs[slot_id]) {
980 : 0 : xhci_warn(xhci, "Bad Slot ID %d\n", slot_id);
981 : 0 : return 0;
982 : : }
983 : :
984 : 0 : dev = kzalloc(sizeof(*dev), flags);
985 [ # # ]: 0 : if (!dev)
986 : : return 0;
987 : :
988 : : /* Allocate the (output) device context that will be used in the HC. */
989 : 0 : dev->out_ctx = xhci_alloc_container_ctx(xhci, XHCI_CTX_TYPE_DEVICE, flags);
990 [ # # ]: 0 : if (!dev->out_ctx)
991 : 0 : goto fail;
992 : :
993 : 0 : xhci_dbg(xhci, "Slot %d output ctx = 0x%llx (dma)\n", slot_id,
994 : : (unsigned long long)dev->out_ctx->dma);
995 : :
996 : : /* Allocate the (input) device context for address device command */
997 : 0 : dev->in_ctx = xhci_alloc_container_ctx(xhci, XHCI_CTX_TYPE_INPUT, flags);
998 [ # # ]: 0 : if (!dev->in_ctx)
999 : 0 : goto fail;
1000 : :
1001 : : xhci_dbg(xhci, "Slot %d input ctx = 0x%llx (dma)\n", slot_id,
1002 : : (unsigned long long)dev->in_ctx->dma);
1003 : :
1004 : : /* Initialize the cancellation list and watchdog timers for each ep */
1005 [ # # ]: 0 : for (i = 0; i < 31; i++) {
1006 : 0 : xhci_init_endpoint_timer(xhci, &dev->eps[i]);
1007 : 0 : INIT_LIST_HEAD(&dev->eps[i].cancelled_td_list);
1008 : 0 : INIT_LIST_HEAD(&dev->eps[i].bw_endpoint_list);
1009 : : }
1010 : :
1011 : : /* Allocate endpoint 0 ring */
1012 : 0 : dev->eps[0].ring = xhci_ring_alloc(xhci, 2, 1, TYPE_CTRL, 0, flags);
1013 [ # # ]: 0 : if (!dev->eps[0].ring)
1014 : 0 : goto fail;
1015 : :
1016 : 0 : dev->udev = udev;
1017 : :
1018 : : /* Point to output device context in dcbaa. */
1019 : 0 : xhci->dcbaa->dev_context_ptrs[slot_id] = cpu_to_le64(dev->out_ctx->dma);
1020 : 0 : xhci_dbg(xhci, "Set slot id %d dcbaa entry %p to 0x%llx\n",
1021 : : slot_id,
1022 : : &xhci->dcbaa->dev_context_ptrs[slot_id],
1023 : : le64_to_cpu(xhci->dcbaa->dev_context_ptrs[slot_id]));
1024 : :
1025 : 0 : trace_xhci_alloc_virt_device(dev);
1026 : :
1027 : 0 : xhci->devs[slot_id] = dev;
1028 : :
1029 : 0 : return 1;
1030 : 0 : fail:
1031 : :
1032 [ # # ]: 0 : if (dev->in_ctx)
1033 : 0 : xhci_free_container_ctx(xhci, dev->in_ctx);
1034 [ # # ]: 0 : if (dev->out_ctx)
1035 : 0 : xhci_free_container_ctx(xhci, dev->out_ctx);
1036 : 0 : kfree(dev);
1037 : :
1038 : 0 : return 0;
1039 : : }
1040 : :
1041 : 0 : void xhci_copy_ep0_dequeue_into_input_ctx(struct xhci_hcd *xhci,
1042 : : struct usb_device *udev)
1043 : : {
1044 : 0 : struct xhci_virt_device *virt_dev;
1045 : 0 : struct xhci_ep_ctx *ep0_ctx;
1046 : 0 : struct xhci_ring *ep_ring;
1047 : :
1048 : 0 : virt_dev = xhci->devs[udev->slot_id];
1049 [ # # ]: 0 : ep0_ctx = xhci_get_ep_ctx(xhci, virt_dev->in_ctx, 0);
1050 : 0 : ep_ring = virt_dev->eps[0].ring;
1051 : : /*
1052 : : * FIXME we don't keep track of the dequeue pointer very well after a
1053 : : * Set TR dequeue pointer, so we're setting the dequeue pointer of the
1054 : : * host to our enqueue pointer. This should only be called after a
1055 : : * configured device has reset, so all control transfers should have
1056 : : * been completed or cancelled before the reset.
1057 : : */
1058 : 0 : ep0_ctx->deq = cpu_to_le64(xhci_trb_virt_to_dma(ep_ring->enq_seg,
1059 : : ep_ring->enqueue)
1060 : : | ep_ring->cycle_state);
1061 : 0 : }
1062 : :
1063 : : /*
1064 : : * The xHCI roothub may have ports of differing speeds in any order in the port
1065 : : * status registers.
1066 : : *
1067 : : * The xHCI hardware wants to know the roothub port number that the USB device
1068 : : * is attached to (or the roothub port its ancestor hub is attached to). All we
1069 : : * know is the index of that port under either the USB 2.0 or the USB 3.0
1070 : : * roothub, but that doesn't give us the real index into the HW port status
1071 : : * registers. Call xhci_find_raw_port_number() to get real index.
1072 : : */
1073 : : static u32 xhci_find_real_port_number(struct xhci_hcd *xhci,
1074 : : struct usb_device *udev)
1075 : : {
1076 : : struct usb_device *top_dev;
1077 : : struct usb_hcd *hcd;
1078 : :
1079 : : if (udev->speed >= USB_SPEED_SUPER)
1080 : : hcd = xhci->shared_hcd;
1081 : : else
1082 : : hcd = xhci->main_hcd;
1083 : :
1084 : : for (top_dev = udev; top_dev->parent && top_dev->parent->parent;
1085 : : top_dev = top_dev->parent)
1086 : : /* Found device below root hub */;
1087 : :
1088 : : return xhci_find_raw_port_number(hcd, top_dev->portnum);
1089 : : }
1090 : :
1091 : : /* Setup an xHCI virtual device for a Set Address command */
1092 : 0 : int xhci_setup_addressable_virt_dev(struct xhci_hcd *xhci, struct usb_device *udev)
1093 : : {
1094 : 0 : struct xhci_virt_device *dev;
1095 : 0 : struct xhci_ep_ctx *ep0_ctx;
1096 : 0 : struct xhci_slot_ctx *slot_ctx;
1097 : 0 : u32 port_num;
1098 : 0 : u32 max_packets;
1099 : 0 : struct usb_device *top_dev;
1100 : :
1101 : 0 : dev = xhci->devs[udev->slot_id];
1102 : : /* Slot ID 0 is reserved */
1103 [ # # # # ]: 0 : if (udev->slot_id == 0 || !dev) {
1104 : 0 : xhci_warn(xhci, "Slot ID %d is not assigned to this device\n",
1105 : : udev->slot_id);
1106 : 0 : return -EINVAL;
1107 : : }
1108 [ # # ]: 0 : ep0_ctx = xhci_get_ep_ctx(xhci, dev->in_ctx, 0);
1109 [ # # ]: 0 : slot_ctx = xhci_get_slot_ctx(xhci, dev->in_ctx);
1110 : :
1111 : : /* 3) Only the control endpoint is valid - one endpoint context */
1112 : 0 : slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(1) | udev->route);
1113 [ # # # # : 0 : switch (udev->speed) {
# # ]
1114 : 0 : case USB_SPEED_SUPER_PLUS:
1115 : 0 : slot_ctx->dev_info |= cpu_to_le32(SLOT_SPEED_SSP);
1116 : 0 : max_packets = MAX_PACKET(512);
1117 : 0 : break;
1118 : 0 : case USB_SPEED_SUPER:
1119 : 0 : slot_ctx->dev_info |= cpu_to_le32(SLOT_SPEED_SS);
1120 : 0 : max_packets = MAX_PACKET(512);
1121 : 0 : break;
1122 : 0 : case USB_SPEED_HIGH:
1123 : 0 : slot_ctx->dev_info |= cpu_to_le32(SLOT_SPEED_HS);
1124 : 0 : max_packets = MAX_PACKET(64);
1125 : 0 : break;
1126 : : /* USB core guesses at a 64-byte max packet first for FS devices */
1127 : 0 : case USB_SPEED_FULL:
1128 : 0 : slot_ctx->dev_info |= cpu_to_le32(SLOT_SPEED_FS);
1129 : 0 : max_packets = MAX_PACKET(64);
1130 : 0 : break;
1131 : 0 : case USB_SPEED_LOW:
1132 : 0 : slot_ctx->dev_info |= cpu_to_le32(SLOT_SPEED_LS);
1133 : 0 : max_packets = MAX_PACKET(8);
1134 : 0 : break;
1135 : : case USB_SPEED_WIRELESS:
1136 : : xhci_dbg(xhci, "FIXME xHCI doesn't support wireless speeds\n");
1137 : : return -EINVAL;
1138 : : break;
1139 : : default:
1140 : : /* Speed was set earlier, this shouldn't happen. */
1141 : : return -EINVAL;
1142 : : }
1143 : : /* Find the root hub port this device is under */
1144 : 0 : port_num = xhci_find_real_port_number(xhci, udev);
1145 [ # # ]: 0 : if (!port_num)
1146 : : return -EINVAL;
1147 : 0 : slot_ctx->dev_info2 |= cpu_to_le32(ROOT_HUB_PORT(port_num));
1148 : : /* Set the port number in the virtual_device to the faked port number */
1149 [ # # # # ]: 0 : for (top_dev = udev; top_dev->parent && top_dev->parent->parent;
1150 : : top_dev = top_dev->parent)
1151 : : /* Found device below root hub */;
1152 : 0 : dev->fake_port = top_dev->portnum;
1153 : 0 : dev->real_port = port_num;
1154 : 0 : xhci_dbg(xhci, "Set root hub portnum to %d\n", port_num);
1155 : 0 : xhci_dbg(xhci, "Set fake root hub portnum to %d\n", dev->fake_port);
1156 : :
1157 : : /* Find the right bandwidth table that this device will be a part of.
1158 : : * If this is a full speed device attached directly to a root port (or a
1159 : : * decendent of one), it counts as a primary bandwidth domain, not a
1160 : : * secondary bandwidth domain under a TT. An xhci_tt_info structure
1161 : : * will never be created for the HS root hub.
1162 : : */
1163 [ # # # # ]: 0 : if (!udev->tt || !udev->tt->hub->parent) {
1164 : 0 : dev->bw_table = &xhci->rh_bw[port_num - 1].bw_table;
1165 : : } else {
1166 : 0 : struct xhci_root_port_bw_info *rh_bw;
1167 : 0 : struct xhci_tt_bw_info *tt_bw;
1168 : :
1169 : 0 : rh_bw = &xhci->rh_bw[port_num - 1];
1170 : : /* Find the right TT. */
1171 [ # # ]: 0 : list_for_each_entry(tt_bw, &rh_bw->tts, tt_list) {
1172 [ # # ]: 0 : if (tt_bw->slot_id != udev->tt->hub->slot_id)
1173 : 0 : continue;
1174 : :
1175 [ # # ]: 0 : if (!dev->udev->tt->multi ||
1176 [ # # ]: 0 : (udev->tt->multi &&
1177 [ # # ]: 0 : tt_bw->ttport == dev->udev->ttport)) {
1178 : 0 : dev->bw_table = &tt_bw->bw_table;
1179 : 0 : dev->tt_info = tt_bw;
1180 : 0 : break;
1181 : : }
1182 : : }
1183 [ # # ]: 0 : if (!dev->tt_info)
1184 : 0 : xhci_warn(xhci, "WARN: Didn't find a matching TT\n");
1185 : : }
1186 : :
1187 : : /* Is this a LS/FS device under an external HS hub? */
1188 [ # # # # ]: 0 : if (udev->tt && udev->tt->hub->parent) {
1189 : 0 : slot_ctx->tt_info = cpu_to_le32(udev->tt->hub->slot_id |
1190 : : (udev->ttport << 8));
1191 [ # # ]: 0 : if (udev->tt->multi)
1192 : 0 : slot_ctx->dev_info |= cpu_to_le32(DEV_MTT);
1193 : : }
1194 : 0 : xhci_dbg(xhci, "udev->tt = %p\n", udev->tt);
1195 : 0 : xhci_dbg(xhci, "udev->ttport = 0x%x\n", udev->ttport);
1196 : :
1197 : : /* Step 4 - ring already allocated */
1198 : : /* Step 5 */
1199 : 0 : ep0_ctx->ep_info2 = cpu_to_le32(EP_TYPE(CTRL_EP));
1200 : :
1201 : : /* EP 0 can handle "burst" sizes of 1, so Max Burst Size field is 0 */
1202 : 0 : ep0_ctx->ep_info2 |= cpu_to_le32(MAX_BURST(0) | ERROR_COUNT(3) |
1203 : : max_packets);
1204 : :
1205 : 0 : ep0_ctx->deq = cpu_to_le64(dev->eps[0].ring->first_seg->dma |
1206 : : dev->eps[0].ring->cycle_state);
1207 : :
1208 : 0 : trace_xhci_setup_addressable_virt_device(dev);
1209 : :
1210 : : /* Steps 7 and 8 were done in xhci_alloc_virt_device() */
1211 : :
1212 : 0 : return 0;
1213 : : }
1214 : :
1215 : : /*
1216 : : * Convert interval expressed as 2^(bInterval - 1) == interval into
1217 : : * straight exponent value 2^n == interval.
1218 : : *
1219 : : */
1220 : : static unsigned int xhci_parse_exponent_interval(struct usb_device *udev,
1221 : : struct usb_host_endpoint *ep)
1222 : : {
1223 : : unsigned int interval;
1224 : :
1225 : : interval = clamp_val(ep->desc.bInterval, 1, 16) - 1;
1226 : : if (interval != ep->desc.bInterval - 1)
1227 : : dev_warn(&udev->dev,
1228 : : "ep %#x - rounding interval to %d %sframes\n",
1229 : : ep->desc.bEndpointAddress,
1230 : : 1 << interval,
1231 : : udev->speed == USB_SPEED_FULL ? "" : "micro");
1232 : :
1233 : : if (udev->speed == USB_SPEED_FULL) {
1234 : : /*
1235 : : * Full speed isoc endpoints specify interval in frames,
1236 : : * not microframes. We are using microframes everywhere,
1237 : : * so adjust accordingly.
1238 : : */
1239 : : interval += 3; /* 1 frame = 2^3 uframes */
1240 : : }
1241 : :
1242 : : return interval;
1243 : : }
1244 : :
1245 : : /*
1246 : : * Convert bInterval expressed in microframes (in 1-255 range) to exponent of
1247 : : * microframes, rounded down to nearest power of 2.
1248 : : */
1249 : 0 : static unsigned int xhci_microframes_to_exponent(struct usb_device *udev,
1250 : : struct usb_host_endpoint *ep, unsigned int desc_interval,
1251 : : unsigned int min_exponent, unsigned int max_exponent)
1252 : : {
1253 : 0 : unsigned int interval;
1254 : :
1255 : 0 : interval = fls(desc_interval) - 1;
1256 : 0 : interval = clamp_val(interval, min_exponent, max_exponent);
1257 : 0 : if ((1 << interval) != desc_interval)
1258 : : dev_dbg(&udev->dev,
1259 : : "ep %#x - rounding interval to %d microframes, ep desc says %d microframes\n",
1260 : : ep->desc.bEndpointAddress,
1261 : : 1 << interval,
1262 : : desc_interval);
1263 : :
1264 : 0 : return interval;
1265 : : }
1266 : :
1267 : 0 : static unsigned int xhci_parse_microframe_interval(struct usb_device *udev,
1268 : : struct usb_host_endpoint *ep)
1269 : : {
1270 : 0 : if (ep->desc.bInterval == 0)
1271 : : return 0;
1272 : 0 : return xhci_microframes_to_exponent(udev, ep,
1273 : : ep->desc.bInterval, 0, 15);
1274 : : }
1275 : :
1276 : :
1277 : 0 : static unsigned int xhci_parse_frame_interval(struct usb_device *udev,
1278 : : struct usb_host_endpoint *ep)
1279 : : {
1280 : 0 : return xhci_microframes_to_exponent(udev, ep,
1281 : 0 : ep->desc.bInterval * 8, 3, 10);
1282 : : }
1283 : :
1284 : : /* Return the polling or NAK interval.
1285 : : *
1286 : : * The polling interval is expressed in "microframes". If xHCI's Interval field
1287 : : * is set to N, it will service the endpoint every 2^(Interval)*125us.
1288 : : *
1289 : : * The NAK interval is one NAK per 1 to 255 microframes, or no NAKs if interval
1290 : : * is set to 0.
1291 : : */
1292 : 0 : static unsigned int xhci_get_endpoint_interval(struct usb_device *udev,
1293 : : struct usb_host_endpoint *ep)
1294 : : {
1295 : 0 : unsigned int interval = 0;
1296 : :
1297 [ # # # # : 0 : switch (udev->speed) {
# ]
1298 : 0 : case USB_SPEED_HIGH:
1299 : : /* Max NAK rate */
1300 [ # # # # ]: 0 : if (usb_endpoint_xfer_control(&ep->desc) ||
1301 : : usb_endpoint_xfer_bulk(&ep->desc)) {
1302 [ # # ]: 0 : interval = xhci_parse_microframe_interval(udev, ep);
1303 : : break;
1304 : : }
1305 : : /* Fall through - SS and HS isoc/int have same decoding */
1306 : :
1307 : : case USB_SPEED_SUPER_PLUS:
1308 : : case USB_SPEED_SUPER:
1309 [ # # # # ]: 0 : if (usb_endpoint_xfer_int(&ep->desc) ||
1310 : : usb_endpoint_xfer_isoc(&ep->desc)) {
1311 : 0 : interval = xhci_parse_exponent_interval(udev, ep);
1312 : : }
1313 : : break;
1314 : :
1315 : 0 : case USB_SPEED_FULL:
1316 [ # # ]: 0 : if (usb_endpoint_xfer_isoc(&ep->desc)) {
1317 : 0 : interval = xhci_parse_exponent_interval(udev, ep);
1318 : 0 : break;
1319 : : }
1320 : : /*
1321 : : * Fall through for interrupt endpoint interval decoding
1322 : : * since it uses the same rules as low speed interrupt
1323 : : * endpoints.
1324 : : */
1325 : : /* fall through */
1326 : :
1327 : : case USB_SPEED_LOW:
1328 [ # # # # ]: 0 : if (usb_endpoint_xfer_int(&ep->desc) ||
1329 : : usb_endpoint_xfer_isoc(&ep->desc)) {
1330 : :
1331 : 0 : interval = xhci_parse_frame_interval(udev, ep);
1332 : : }
1333 : : break;
1334 : :
1335 : 0 : default:
1336 : 0 : BUG();
1337 : : }
1338 : 0 : return interval;
1339 : : }
1340 : :
1341 : : /* The "Mult" field in the endpoint context is only set for SuperSpeed isoc eps.
1342 : : * High speed endpoint descriptors can define "the number of additional
1343 : : * transaction opportunities per microframe", but that goes in the Max Burst
1344 : : * endpoint context field.
1345 : : */
1346 : 0 : static u32 xhci_get_endpoint_mult(struct usb_device *udev,
1347 : : struct usb_host_endpoint *ep)
1348 : : {
1349 [ # # ]: 0 : if (udev->speed < USB_SPEED_SUPER ||
1350 : : !usb_endpoint_xfer_isoc(&ep->desc))
1351 : : return 0;
1352 : 0 : return ep->ss_ep_comp.bmAttributes;
1353 : : }
1354 : :
1355 : 0 : static u32 xhci_get_endpoint_max_burst(struct usb_device *udev,
1356 : : struct usb_host_endpoint *ep)
1357 : : {
1358 : : /* Super speed and Plus have max burst in ep companion desc */
1359 : 0 : if (udev->speed >= USB_SPEED_SUPER)
1360 : 0 : return ep->ss_ep_comp.bMaxBurst;
1361 : :
1362 [ # # # # ]: 0 : if (udev->speed == USB_SPEED_HIGH &&
1363 [ # # ]: 0 : (usb_endpoint_xfer_isoc(&ep->desc) ||
1364 : : usb_endpoint_xfer_int(&ep->desc)))
1365 : 0 : return usb_endpoint_maxp_mult(&ep->desc) - 1;
1366 : :
1367 : : return 0;
1368 : : }
1369 : :
1370 : 0 : static u32 xhci_get_endpoint_type(struct usb_host_endpoint *ep)
1371 : : {
1372 : 0 : int in;
1373 : :
1374 : 0 : in = usb_endpoint_dir_in(&ep->desc);
1375 : :
1376 [ # # # # ]: 0 : switch (usb_endpoint_type(&ep->desc)) {
1377 : : case USB_ENDPOINT_XFER_CONTROL:
1378 : : return CTRL_EP;
1379 : 0 : case USB_ENDPOINT_XFER_BULK:
1380 [ # # ]: 0 : return in ? BULK_IN_EP : BULK_OUT_EP;
1381 : 0 : case USB_ENDPOINT_XFER_ISOC:
1382 [ # # ]: 0 : return in ? ISOC_IN_EP : ISOC_OUT_EP;
1383 : 0 : case USB_ENDPOINT_XFER_INT:
1384 [ # # ]: 0 : return in ? INT_IN_EP : INT_OUT_EP;
1385 : : }
1386 : : return 0;
1387 : : }
1388 : :
1389 : : /* Return the maximum endpoint service interval time (ESIT) payload.
1390 : : * Basically, this is the maxpacket size, multiplied by the burst size
1391 : : * and mult size.
1392 : : */
1393 : : static u32 xhci_get_max_esit_payload(struct usb_device *udev,
1394 : : struct usb_host_endpoint *ep)
1395 : : {
1396 : : int max_burst;
1397 : : int max_packet;
1398 : :
1399 : : /* Only applies for interrupt or isochronous endpoints */
1400 : : if (usb_endpoint_xfer_control(&ep->desc) ||
1401 : : usb_endpoint_xfer_bulk(&ep->desc))
1402 : : return 0;
1403 : :
1404 : : /* SuperSpeedPlus Isoc ep sending over 48k per esit */
1405 : : if ((udev->speed >= USB_SPEED_SUPER_PLUS) &&
1406 : : USB_SS_SSP_ISOC_COMP(ep->ss_ep_comp.bmAttributes))
1407 : : return le32_to_cpu(ep->ssp_isoc_ep_comp.dwBytesPerInterval);
1408 : : /* SuperSpeed or SuperSpeedPlus Isoc ep with less than 48k per esit */
1409 : : else if (udev->speed >= USB_SPEED_SUPER)
1410 : : return le16_to_cpu(ep->ss_ep_comp.wBytesPerInterval);
1411 : :
1412 : : max_packet = usb_endpoint_maxp(&ep->desc);
1413 : : max_burst = usb_endpoint_maxp_mult(&ep->desc);
1414 : : /* A 0 in max burst means 1 transfer per ESIT */
1415 : : return max_packet * max_burst;
1416 : : }
1417 : :
1418 : : /* Set up an endpoint with one ring segment. Do not allocate stream rings.
1419 : : * Drivers will have to call usb_alloc_streams() to do that.
1420 : : */
1421 : 0 : int xhci_endpoint_init(struct xhci_hcd *xhci,
1422 : : struct xhci_virt_device *virt_dev,
1423 : : struct usb_device *udev,
1424 : : struct usb_host_endpoint *ep,
1425 : : gfp_t mem_flags)
1426 : : {
1427 : 0 : unsigned int ep_index;
1428 : 0 : struct xhci_ep_ctx *ep_ctx;
1429 : 0 : struct xhci_ring *ep_ring;
1430 : 0 : unsigned int max_packet;
1431 : 0 : enum xhci_ring_type ring_type;
1432 : 0 : u32 max_esit_payload;
1433 : 0 : u32 endpoint_type;
1434 : 0 : unsigned int max_burst;
1435 : 0 : unsigned int interval;
1436 : 0 : unsigned int mult;
1437 : 0 : unsigned int avg_trb_len;
1438 : 0 : unsigned int err_count = 0;
1439 : :
1440 : 0 : ep_index = xhci_get_endpoint_index(&ep->desc);
1441 [ # # ]: 0 : ep_ctx = xhci_get_ep_ctx(xhci, virt_dev->in_ctx, ep_index);
1442 : :
1443 [ # # # # ]: 0 : endpoint_type = xhci_get_endpoint_type(ep);
1444 : 0 : if (!endpoint_type)
1445 : : return -EINVAL;
1446 : :
1447 : 0 : ring_type = usb_endpoint_type(&ep->desc);
1448 : :
1449 : : /*
1450 : : * Get values to fill the endpoint context, mostly from ep descriptor.
1451 : : * The average TRB buffer lengt for bulk endpoints is unclear as we
1452 : : * have no clue on scatter gather list entry size. For Isoc and Int,
1453 : : * set it to max available. See xHCI 1.1 spec 4.14.1.1 for details.
1454 : : */
1455 : 0 : max_esit_payload = xhci_get_max_esit_payload(udev, ep);
1456 : 0 : interval = xhci_get_endpoint_interval(udev, ep);
1457 : :
1458 : : /* Periodic endpoint bInterval limit quirk */
1459 [ # # # # ]: 0 : if (usb_endpoint_xfer_int(&ep->desc) ||
1460 : : usb_endpoint_xfer_isoc(&ep->desc)) {
1461 [ # # ]: 0 : if ((xhci->quirks & XHCI_LIMIT_ENDPOINT_INTERVAL_7) &&
1462 [ # # ]: 0 : udev->speed >= USB_SPEED_HIGH &&
1463 : : interval >= 7) {
1464 : : interval = 6;
1465 : : }
1466 : : }
1467 : :
1468 [ # # ]: 0 : mult = xhci_get_endpoint_mult(udev, ep);
1469 [ # # ]: 0 : max_packet = usb_endpoint_maxp(&ep->desc);
1470 [ # # ]: 0 : max_burst = xhci_get_endpoint_max_burst(udev, ep);
1471 : 0 : avg_trb_len = max_esit_payload;
1472 : :
1473 : : /* FIXME dig Mult and streams info out of ep companion desc */
1474 : :
1475 : : /* Allow 3 retries for everything but isoc, set CErr = 3 */
1476 [ # # ]: 0 : if (!usb_endpoint_xfer_isoc(&ep->desc))
1477 : 0 : err_count = 3;
1478 : : /* HS bulk max packet should be 512, FS bulk supports 8, 16, 32 or 64 */
1479 [ # # ]: 0 : if (usb_endpoint_xfer_bulk(&ep->desc)) {
1480 [ # # ]: 0 : if (udev->speed == USB_SPEED_HIGH)
1481 : 0 : max_packet = 512;
1482 [ # # ]: 0 : if (udev->speed == USB_SPEED_FULL) {
1483 [ # # # # : 0 : max_packet = rounddown_pow_of_two(max_packet);
# # # # #
# # # # #
# # # # #
# # # ]
1484 : 0 : max_packet = clamp_val(max_packet, 8, 64);
1485 : : }
1486 : : }
1487 : : /* xHCI 1.0 and 1.1 indicates that ctrl ep avg TRB Length should be 8 */
1488 [ # # # # ]: 0 : if (usb_endpoint_xfer_control(&ep->desc) && xhci->hci_version >= 0x100)
1489 : 0 : avg_trb_len = 8;
1490 : : /* xhci 1.1 with LEC support doesn't use mult field, use RsvdZ */
1491 [ # # # # ]: 0 : if ((xhci->hci_version > 0x100) && HCC2_LEC(xhci->hcc_params2))
1492 : 0 : mult = 0;
1493 : :
1494 : : /* Set up the endpoint ring */
1495 : 0 : virt_dev->eps[ep_index].new_ring =
1496 : 0 : xhci_ring_alloc(xhci, 2, 1, ring_type, max_packet, mem_flags);
1497 [ # # ]: 0 : if (!virt_dev->eps[ep_index].new_ring)
1498 : : return -ENOMEM;
1499 : :
1500 : 0 : virt_dev->eps[ep_index].skip = false;
1501 : 0 : ep_ring = virt_dev->eps[ep_index].new_ring;
1502 : :
1503 : : /* Fill the endpoint context */
1504 : 0 : ep_ctx->ep_info = cpu_to_le32(EP_MAX_ESIT_PAYLOAD_HI(max_esit_payload) |
1505 : : EP_INTERVAL(interval) |
1506 : : EP_MULT(mult));
1507 : 0 : ep_ctx->ep_info2 = cpu_to_le32(EP_TYPE(endpoint_type) |
1508 : : MAX_PACKET(max_packet) |
1509 : : MAX_BURST(max_burst) |
1510 : : ERROR_COUNT(err_count));
1511 : 0 : ep_ctx->deq = cpu_to_le64(ep_ring->first_seg->dma |
1512 : : ep_ring->cycle_state);
1513 : :
1514 : 0 : ep_ctx->tx_info = cpu_to_le32(EP_MAX_ESIT_PAYLOAD_LO(max_esit_payload) |
1515 : : EP_AVG_TRB_LENGTH(avg_trb_len));
1516 : :
1517 : 0 : return 0;
1518 : : }
1519 : :
1520 : 0 : void xhci_endpoint_zero(struct xhci_hcd *xhci,
1521 : : struct xhci_virt_device *virt_dev,
1522 : : struct usb_host_endpoint *ep)
1523 : : {
1524 : 0 : unsigned int ep_index;
1525 : 0 : struct xhci_ep_ctx *ep_ctx;
1526 : :
1527 : 0 : ep_index = xhci_get_endpoint_index(&ep->desc);
1528 [ # # ]: 0 : ep_ctx = xhci_get_ep_ctx(xhci, virt_dev->in_ctx, ep_index);
1529 : :
1530 : 0 : ep_ctx->ep_info = 0;
1531 : 0 : ep_ctx->ep_info2 = 0;
1532 : 0 : ep_ctx->deq = 0;
1533 : 0 : ep_ctx->tx_info = 0;
1534 : : /* Don't free the endpoint ring until the set interface or configuration
1535 : : * request succeeds.
1536 : : */
1537 : 0 : }
1538 : :
1539 : 0 : void xhci_clear_endpoint_bw_info(struct xhci_bw_info *bw_info)
1540 : : {
1541 : 0 : bw_info->ep_interval = 0;
1542 : 0 : bw_info->mult = 0;
1543 : 0 : bw_info->num_packets = 0;
1544 : 0 : bw_info->max_packet_size = 0;
1545 : 0 : bw_info->type = 0;
1546 : 0 : bw_info->max_esit_payload = 0;
1547 : 0 : }
1548 : :
1549 : 0 : void xhci_update_bw_info(struct xhci_hcd *xhci,
1550 : : struct xhci_container_ctx *in_ctx,
1551 : : struct xhci_input_control_ctx *ctrl_ctx,
1552 : : struct xhci_virt_device *virt_dev)
1553 : : {
1554 : 0 : struct xhci_bw_info *bw_info;
1555 : 0 : struct xhci_ep_ctx *ep_ctx;
1556 : 0 : unsigned int ep_type;
1557 : 0 : int i;
1558 : :
1559 [ # # ]: 0 : for (i = 1; i < 31; i++) {
1560 : 0 : bw_info = &virt_dev->eps[i].bw_info;
1561 : :
1562 : : /* We can't tell what endpoint type is being dropped, but
1563 : : * unconditionally clearing the bandwidth info for non-periodic
1564 : : * endpoints should be harmless because the info will never be
1565 : : * set in the first place.
1566 : : */
1567 [ # # # # ]: 0 : if (!EP_IS_ADDED(ctrl_ctx, i) && EP_IS_DROPPED(ctrl_ctx, i)) {
1568 : : /* Dropped endpoint */
1569 : 0 : xhci_clear_endpoint_bw_info(bw_info);
1570 : 0 : continue;
1571 : : }
1572 : :
1573 [ # # ]: 0 : if (EP_IS_ADDED(ctrl_ctx, i)) {
1574 [ # # ]: 0 : ep_ctx = xhci_get_ep_ctx(xhci, in_ctx, i);
1575 : 0 : ep_type = CTX_TO_EP_TYPE(le32_to_cpu(ep_ctx->ep_info2));
1576 : :
1577 : : /* Ignore non-periodic endpoints */
1578 [ # # ]: 0 : if (ep_type != ISOC_OUT_EP && ep_type != INT_OUT_EP &&
1579 : 0 : ep_type != ISOC_IN_EP &&
1580 [ # # ]: 0 : ep_type != INT_IN_EP)
1581 : 0 : continue;
1582 : :
1583 : : /* Added or changed endpoint */
1584 : 0 : bw_info->ep_interval = CTX_TO_EP_INTERVAL(
1585 : : le32_to_cpu(ep_ctx->ep_info));
1586 : : /* Number of packets and mult are zero-based in the
1587 : : * input context, but we want one-based for the
1588 : : * interval table.
1589 : : */
1590 : 0 : bw_info->mult = CTX_TO_EP_MULT(
1591 : 0 : le32_to_cpu(ep_ctx->ep_info)) + 1;
1592 : 0 : bw_info->num_packets = CTX_TO_MAX_BURST(
1593 : 0 : le32_to_cpu(ep_ctx->ep_info2)) + 1;
1594 : 0 : bw_info->max_packet_size = MAX_PACKET_DECODED(
1595 : : le32_to_cpu(ep_ctx->ep_info2));
1596 : 0 : bw_info->type = ep_type;
1597 : 0 : bw_info->max_esit_payload = CTX_TO_MAX_ESIT_PAYLOAD(
1598 : : le32_to_cpu(ep_ctx->tx_info));
1599 : : }
1600 : : }
1601 : 0 : }
1602 : :
1603 : : /* Copy output xhci_ep_ctx to the input xhci_ep_ctx copy.
1604 : : * Useful when you want to change one particular aspect of the endpoint and then
1605 : : * issue a configure endpoint command.
1606 : : */
1607 : 0 : void xhci_endpoint_copy(struct xhci_hcd *xhci,
1608 : : struct xhci_container_ctx *in_ctx,
1609 : : struct xhci_container_ctx *out_ctx,
1610 : : unsigned int ep_index)
1611 : : {
1612 : 0 : struct xhci_ep_ctx *out_ep_ctx;
1613 : 0 : struct xhci_ep_ctx *in_ep_ctx;
1614 : :
1615 [ # # ]: 0 : out_ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
1616 [ # # ]: 0 : in_ep_ctx = xhci_get_ep_ctx(xhci, in_ctx, ep_index);
1617 : :
1618 : 0 : in_ep_ctx->ep_info = out_ep_ctx->ep_info;
1619 : 0 : in_ep_ctx->ep_info2 = out_ep_ctx->ep_info2;
1620 : 0 : in_ep_ctx->deq = out_ep_ctx->deq;
1621 : 0 : in_ep_ctx->tx_info = out_ep_ctx->tx_info;
1622 [ # # ]: 0 : if (xhci->quirks & XHCI_MTK_HOST) {
1623 : 0 : in_ep_ctx->reserved[0] = out_ep_ctx->reserved[0];
1624 : 0 : in_ep_ctx->reserved[1] = out_ep_ctx->reserved[1];
1625 : : }
1626 : 0 : }
1627 : :
1628 : : /* Copy output xhci_slot_ctx to the input xhci_slot_ctx.
1629 : : * Useful when you want to change one particular aspect of the endpoint and then
1630 : : * issue a configure endpoint command. Only the context entries field matters,
1631 : : * but we'll copy the whole thing anyway.
1632 : : */
1633 : 0 : void xhci_slot_copy(struct xhci_hcd *xhci,
1634 : : struct xhci_container_ctx *in_ctx,
1635 : : struct xhci_container_ctx *out_ctx)
1636 : : {
1637 : 0 : struct xhci_slot_ctx *in_slot_ctx;
1638 : 0 : struct xhci_slot_ctx *out_slot_ctx;
1639 : :
1640 [ # # ]: 0 : in_slot_ctx = xhci_get_slot_ctx(xhci, in_ctx);
1641 [ # # ]: 0 : out_slot_ctx = xhci_get_slot_ctx(xhci, out_ctx);
1642 : :
1643 : 0 : in_slot_ctx->dev_info = out_slot_ctx->dev_info;
1644 : 0 : in_slot_ctx->dev_info2 = out_slot_ctx->dev_info2;
1645 : 0 : in_slot_ctx->tt_info = out_slot_ctx->tt_info;
1646 : 0 : in_slot_ctx->dev_state = out_slot_ctx->dev_state;
1647 : 0 : }
1648 : :
1649 : : /* Set up the scratchpad buffer array and scratchpad buffers, if needed. */
1650 : 0 : static int scratchpad_alloc(struct xhci_hcd *xhci, gfp_t flags)
1651 : : {
1652 : 0 : int i;
1653 : 0 : struct device *dev = xhci_to_hcd(xhci)->self.sysdev;
1654 : 0 : int num_sp = HCS_MAX_SCRATCHPAD(xhci->hcs_params2);
1655 : :
1656 : 0 : xhci_dbg_trace(xhci, trace_xhci_dbg_init,
1657 : : "Allocating %d scratchpad buffers", num_sp);
1658 : :
1659 [ # # ]: 0 : if (!num_sp)
1660 : : return 0;
1661 : :
1662 : 0 : xhci->scratchpad = kzalloc_node(sizeof(*xhci->scratchpad), flags,
1663 : : dev_to_node(dev));
1664 [ # # ]: 0 : if (!xhci->scratchpad)
1665 : 0 : goto fail_sp;
1666 : :
1667 : 0 : xhci->scratchpad->sp_array = dma_alloc_coherent(dev,
1668 : : num_sp * sizeof(u64),
1669 : : &xhci->scratchpad->sp_dma, flags);
1670 [ # # ]: 0 : if (!xhci->scratchpad->sp_array)
1671 : 0 : goto fail_sp2;
1672 : :
1673 : 0 : xhci->scratchpad->sp_buffers = kcalloc_node(num_sp, sizeof(void *),
1674 : : flags, dev_to_node(dev));
1675 [ # # ]: 0 : if (!xhci->scratchpad->sp_buffers)
1676 : 0 : goto fail_sp3;
1677 : :
1678 : 0 : xhci->dcbaa->dev_context_ptrs[0] = cpu_to_le64(xhci->scratchpad->sp_dma);
1679 [ # # ]: 0 : for (i = 0; i < num_sp; i++) {
1680 : 0 : dma_addr_t dma;
1681 : 0 : void *buf = dma_alloc_coherent(dev, xhci->page_size, &dma,
1682 : : flags);
1683 [ # # ]: 0 : if (!buf)
1684 : 0 : goto fail_sp4;
1685 : :
1686 : 0 : xhci->scratchpad->sp_array[i] = dma;
1687 : 0 : xhci->scratchpad->sp_buffers[i] = buf;
1688 : : }
1689 : :
1690 : : return 0;
1691 : :
1692 : : fail_sp4:
1693 [ # # ]: 0 : for (i = i - 1; i >= 0; i--) {
1694 : 0 : dma_free_coherent(dev, xhci->page_size,
1695 : 0 : xhci->scratchpad->sp_buffers[i],
1696 : 0 : xhci->scratchpad->sp_array[i]);
1697 : : }
1698 : :
1699 : 0 : kfree(xhci->scratchpad->sp_buffers);
1700 : :
1701 : 0 : fail_sp3:
1702 : 0 : dma_free_coherent(dev, num_sp * sizeof(u64),
1703 : 0 : xhci->scratchpad->sp_array,
1704 : 0 : xhci->scratchpad->sp_dma);
1705 : :
1706 : 0 : fail_sp2:
1707 : 0 : kfree(xhci->scratchpad);
1708 : 0 : xhci->scratchpad = NULL;
1709 : :
1710 : : fail_sp:
1711 : : return -ENOMEM;
1712 : : }
1713 : :
1714 : 0 : static void scratchpad_free(struct xhci_hcd *xhci)
1715 : : {
1716 : 0 : int num_sp;
1717 : 0 : int i;
1718 [ # # ]: 0 : struct device *dev = xhci_to_hcd(xhci)->self.sysdev;
1719 : :
1720 [ # # ]: 0 : if (!xhci->scratchpad)
1721 : : return;
1722 : :
1723 : 0 : num_sp = HCS_MAX_SCRATCHPAD(xhci->hcs_params2);
1724 : :
1725 [ # # ]: 0 : for (i = 0; i < num_sp; i++) {
1726 : 0 : dma_free_coherent(dev, xhci->page_size,
1727 : 0 : xhci->scratchpad->sp_buffers[i],
1728 : 0 : xhci->scratchpad->sp_array[i]);
1729 : : }
1730 : 0 : kfree(xhci->scratchpad->sp_buffers);
1731 : 0 : dma_free_coherent(dev, num_sp * sizeof(u64),
1732 : 0 : xhci->scratchpad->sp_array,
1733 : 0 : xhci->scratchpad->sp_dma);
1734 : 0 : kfree(xhci->scratchpad);
1735 : 0 : xhci->scratchpad = NULL;
1736 : : }
1737 : :
1738 : 0 : struct xhci_command *xhci_alloc_command(struct xhci_hcd *xhci,
1739 : : bool allocate_completion, gfp_t mem_flags)
1740 : : {
1741 : 0 : struct xhci_command *command;
1742 : 0 : struct device *dev = xhci_to_hcd(xhci)->self.sysdev;
1743 : :
1744 : 0 : command = kzalloc_node(sizeof(*command), mem_flags, dev_to_node(dev));
1745 [ # # ]: 0 : if (!command)
1746 : : return NULL;
1747 : :
1748 [ # # ]: 0 : if (allocate_completion) {
1749 : 0 : command->completion =
1750 : 0 : kzalloc_node(sizeof(struct completion), mem_flags,
1751 : : dev_to_node(dev));
1752 [ # # ]: 0 : if (!command->completion) {
1753 : 0 : kfree(command);
1754 : 0 : return NULL;
1755 : : }
1756 : 0 : init_completion(command->completion);
1757 : : }
1758 : :
1759 : 0 : command->status = 0;
1760 : 0 : INIT_LIST_HEAD(&command->cmd_list);
1761 : 0 : return command;
1762 : : }
1763 : :
1764 : 0 : struct xhci_command *xhci_alloc_command_with_ctx(struct xhci_hcd *xhci,
1765 : : bool allocate_completion, gfp_t mem_flags)
1766 : : {
1767 : 0 : struct xhci_command *command;
1768 : :
1769 : 0 : command = xhci_alloc_command(xhci, allocate_completion, mem_flags);
1770 [ # # ]: 0 : if (!command)
1771 : : return NULL;
1772 : :
1773 : 0 : command->in_ctx = xhci_alloc_container_ctx(xhci, XHCI_CTX_TYPE_INPUT,
1774 : : mem_flags);
1775 [ # # ]: 0 : if (!command->in_ctx) {
1776 : 0 : kfree(command->completion);
1777 : 0 : kfree(command);
1778 : 0 : return NULL;
1779 : : }
1780 : : return command;
1781 : : }
1782 : :
1783 : 0 : void xhci_urb_free_priv(struct urb_priv *urb_priv)
1784 : : {
1785 : 0 : kfree(urb_priv);
1786 : 0 : }
1787 : :
1788 : 0 : void xhci_free_command(struct xhci_hcd *xhci,
1789 : : struct xhci_command *command)
1790 : : {
1791 : 0 : xhci_free_container_ctx(xhci,
1792 : : command->in_ctx);
1793 : 0 : kfree(command->completion);
1794 : 0 : kfree(command);
1795 : 0 : }
1796 : :
1797 : 0 : int xhci_alloc_erst(struct xhci_hcd *xhci,
1798 : : struct xhci_ring *evt_ring,
1799 : : struct xhci_erst *erst,
1800 : : gfp_t flags)
1801 : : {
1802 : 0 : size_t size;
1803 : 0 : unsigned int val;
1804 : 0 : struct xhci_segment *seg;
1805 : 0 : struct xhci_erst_entry *entry;
1806 : :
1807 : 0 : size = sizeof(struct xhci_erst_entry) * evt_ring->num_segs;
1808 : 0 : erst->entries = dma_alloc_coherent(xhci_to_hcd(xhci)->self.sysdev,
1809 : : size, &erst->erst_dma_addr, flags);
1810 [ # # ]: 0 : if (!erst->entries)
1811 : : return -ENOMEM;
1812 : :
1813 : 0 : erst->num_entries = evt_ring->num_segs;
1814 : :
1815 : 0 : seg = evt_ring->first_seg;
1816 [ # # ]: 0 : for (val = 0; val < evt_ring->num_segs; val++) {
1817 : 0 : entry = &erst->entries[val];
1818 : 0 : entry->seg_addr = cpu_to_le64(seg->dma);
1819 : 0 : entry->seg_size = cpu_to_le32(TRBS_PER_SEGMENT);
1820 : 0 : entry->rsvd = 0;
1821 : 0 : seg = seg->next;
1822 : : }
1823 : :
1824 : : return 0;
1825 : : }
1826 : :
1827 : 0 : void xhci_free_erst(struct xhci_hcd *xhci, struct xhci_erst *erst)
1828 : : {
1829 : 0 : size_t size;
1830 [ # # ]: 0 : struct device *dev = xhci_to_hcd(xhci)->self.sysdev;
1831 : :
1832 : 0 : size = sizeof(struct xhci_erst_entry) * (erst->num_entries);
1833 [ # # ]: 0 : if (erst->entries)
1834 : 0 : dma_free_coherent(dev, size,
1835 : : erst->entries,
1836 : : erst->erst_dma_addr);
1837 : 0 : erst->entries = NULL;
1838 : 0 : }
1839 : :
1840 : 0 : void xhci_mem_cleanup(struct xhci_hcd *xhci)
1841 : : {
1842 : 0 : struct device *dev = xhci_to_hcd(xhci)->self.sysdev;
1843 : 0 : int i, j, num_ports;
1844 : :
1845 : 0 : cancel_delayed_work_sync(&xhci->cmd_timer);
1846 : :
1847 : 0 : xhci_free_erst(xhci, &xhci->erst);
1848 : :
1849 [ # # ]: 0 : if (xhci->event_ring)
1850 : 0 : xhci_ring_free(xhci, xhci->event_ring);
1851 : 0 : xhci->event_ring = NULL;
1852 : 0 : xhci_dbg_trace(xhci, trace_xhci_dbg_init, "Freed event ring");
1853 : :
1854 [ # # ]: 0 : if (xhci->lpm_command)
1855 : 0 : xhci_free_command(xhci, xhci->lpm_command);
1856 : 0 : xhci->lpm_command = NULL;
1857 [ # # ]: 0 : if (xhci->cmd_ring)
1858 : 0 : xhci_ring_free(xhci, xhci->cmd_ring);
1859 : 0 : xhci->cmd_ring = NULL;
1860 : 0 : xhci_dbg_trace(xhci, trace_xhci_dbg_init, "Freed command ring");
1861 : 0 : xhci_cleanup_command_queue(xhci);
1862 : :
1863 : 0 : num_ports = HCS_MAX_PORTS(xhci->hcs_params1);
1864 [ # # # # ]: 0 : for (i = 0; i < num_ports && xhci->rh_bw; i++) {
1865 : 0 : struct xhci_interval_bw_table *bwt = &xhci->rh_bw[i].bw_table;
1866 [ # # ]: 0 : for (j = 0; j < XHCI_MAX_INTERVAL; j++) {
1867 : 0 : struct list_head *ep = &bwt->interval_bw[j].endpoints;
1868 [ # # ]: 0 : while (!list_empty(ep))
1869 : 0 : list_del_init(ep->next);
1870 : : }
1871 : : }
1872 : :
1873 [ # # ]: 0 : for (i = HCS_MAX_SLOTS(xhci->hcs_params1); i > 0; i--)
1874 : 0 : xhci_free_virt_devices_depth_first(xhci, i);
1875 : :
1876 : 0 : dma_pool_destroy(xhci->segment_pool);
1877 : 0 : xhci->segment_pool = NULL;
1878 : 0 : xhci_dbg_trace(xhci, trace_xhci_dbg_init, "Freed segment pool");
1879 : :
1880 : 0 : dma_pool_destroy(xhci->device_pool);
1881 : 0 : xhci->device_pool = NULL;
1882 : 0 : xhci_dbg_trace(xhci, trace_xhci_dbg_init, "Freed device context pool");
1883 : :
1884 : 0 : dma_pool_destroy(xhci->small_streams_pool);
1885 : 0 : xhci->small_streams_pool = NULL;
1886 : 0 : xhci_dbg_trace(xhci, trace_xhci_dbg_init,
1887 : : "Freed small stream array pool");
1888 : :
1889 : 0 : dma_pool_destroy(xhci->medium_streams_pool);
1890 : 0 : xhci->medium_streams_pool = NULL;
1891 : 0 : xhci_dbg_trace(xhci, trace_xhci_dbg_init,
1892 : : "Freed medium stream array pool");
1893 : :
1894 [ # # ]: 0 : if (xhci->dcbaa)
1895 : 0 : dma_free_coherent(dev, sizeof(*xhci->dcbaa),
1896 : : xhci->dcbaa, xhci->dcbaa->dma);
1897 : 0 : xhci->dcbaa = NULL;
1898 : :
1899 : 0 : scratchpad_free(xhci);
1900 : :
1901 [ # # ]: 0 : if (!xhci->rh_bw)
1902 : 0 : goto no_bw;
1903 : :
1904 [ # # ]: 0 : for (i = 0; i < num_ports; i++) {
1905 : 0 : struct xhci_tt_bw_info *tt, *n;
1906 [ # # ]: 0 : list_for_each_entry_safe(tt, n, &xhci->rh_bw[i].tts, tt_list) {
1907 : 0 : list_del(&tt->tt_list);
1908 : 0 : kfree(tt);
1909 : : }
1910 : : }
1911 : :
1912 : 0 : no_bw:
1913 : 0 : xhci->cmd_ring_reserved_trbs = 0;
1914 : 0 : xhci->usb2_rhub.num_ports = 0;
1915 : 0 : xhci->usb3_rhub.num_ports = 0;
1916 : 0 : xhci->num_active_eps = 0;
1917 : 0 : kfree(xhci->usb2_rhub.ports);
1918 : 0 : kfree(xhci->usb3_rhub.ports);
1919 : 0 : kfree(xhci->hw_ports);
1920 : 0 : kfree(xhci->rh_bw);
1921 : 0 : kfree(xhci->ext_caps);
1922 [ # # ]: 0 : for (i = 0; i < xhci->num_port_caps; i++)
1923 : 0 : kfree(xhci->port_caps[i].psi);
1924 : 0 : kfree(xhci->port_caps);
1925 : 0 : xhci->num_port_caps = 0;
1926 : :
1927 : 0 : xhci->usb2_rhub.ports = NULL;
1928 : 0 : xhci->usb3_rhub.ports = NULL;
1929 : 0 : xhci->hw_ports = NULL;
1930 : 0 : xhci->rh_bw = NULL;
1931 : 0 : xhci->ext_caps = NULL;
1932 : :
1933 : 0 : xhci->page_size = 0;
1934 : 0 : xhci->page_shift = 0;
1935 : 0 : xhci->usb2_rhub.bus_state.bus_suspended = 0;
1936 : 0 : xhci->usb3_rhub.bus_state.bus_suspended = 0;
1937 : 0 : }
1938 : :
1939 : 0 : static int xhci_test_trb_in_td(struct xhci_hcd *xhci,
1940 : : struct xhci_segment *input_seg,
1941 : : union xhci_trb *start_trb,
1942 : : union xhci_trb *end_trb,
1943 : : dma_addr_t input_dma,
1944 : : struct xhci_segment *result_seg,
1945 : : char *test_name, int test_number)
1946 : : {
1947 : 0 : unsigned long long start_dma;
1948 : 0 : unsigned long long end_dma;
1949 : 0 : struct xhci_segment *seg;
1950 : :
1951 : 0 : start_dma = xhci_trb_virt_to_dma(input_seg, start_trb);
1952 : 0 : end_dma = xhci_trb_virt_to_dma(input_seg, end_trb);
1953 : :
1954 : 0 : seg = trb_in_td(xhci, input_seg, start_trb, end_trb, input_dma, false);
1955 [ # # ]: 0 : if (seg != result_seg) {
1956 : 0 : xhci_warn(xhci, "WARN: %s TRB math test %d failed!\n",
1957 : : test_name, test_number);
1958 : 0 : xhci_warn(xhci, "Tested TRB math w/ seg %p and "
1959 : : "input DMA 0x%llx\n",
1960 : : input_seg,
1961 : : (unsigned long long) input_dma);
1962 : 0 : xhci_warn(xhci, "starting TRB %p (0x%llx DMA), "
1963 : : "ending TRB %p (0x%llx DMA)\n",
1964 : : start_trb, start_dma,
1965 : : end_trb, end_dma);
1966 : 0 : xhci_warn(xhci, "Expected seg %p, got seg %p\n",
1967 : : result_seg, seg);
1968 : 0 : trb_in_td(xhci, input_seg, start_trb, end_trb, input_dma,
1969 : : true);
1970 : 0 : return -1;
1971 : : }
1972 : : return 0;
1973 : : }
1974 : :
1975 : : /* TRB math checks for xhci_trb_in_td(), using the command and event rings. */
1976 : 0 : static int xhci_check_trb_in_td_math(struct xhci_hcd *xhci)
1977 : : {
1978 : 0 : struct {
1979 : : dma_addr_t input_dma;
1980 : : struct xhci_segment *result_seg;
1981 : 0 : } simple_test_vector [] = {
1982 : : /* A zeroed DMA field should fail */
1983 : : { 0, NULL },
1984 : : /* One TRB before the ring start should fail */
1985 : 0 : { xhci->event_ring->first_seg->dma - 16, NULL },
1986 : : /* One byte before the ring start should fail */
1987 : 0 : { xhci->event_ring->first_seg->dma - 1, NULL },
1988 : : /* Starting TRB should succeed */
1989 : : { xhci->event_ring->first_seg->dma, xhci->event_ring->first_seg },
1990 : : /* Ending TRB should succeed */
1991 : 0 : { xhci->event_ring->first_seg->dma + (TRBS_PER_SEGMENT - 1)*16,
1992 : : xhci->event_ring->first_seg },
1993 : : /* One byte after the ring end should fail */
1994 : 0 : { xhci->event_ring->first_seg->dma + (TRBS_PER_SEGMENT - 1)*16 + 1, NULL },
1995 : : /* One TRB after the ring end should fail */
1996 : 0 : { xhci->event_ring->first_seg->dma + (TRBS_PER_SEGMENT)*16, NULL },
1997 : : /* An address of all ones should fail */
1998 : : { (dma_addr_t) (~0), NULL },
1999 : : };
2000 : 0 : struct {
2001 : : struct xhci_segment *input_seg;
2002 : : union xhci_trb *start_trb;
2003 : : union xhci_trb *end_trb;
2004 : : dma_addr_t input_dma;
2005 : : struct xhci_segment *result_seg;
2006 : 0 : } complex_test_vector [] = {
2007 : : /* Test feeding a valid DMA address from a different ring */
2008 : : { .input_seg = xhci->event_ring->first_seg,
2009 : 0 : .start_trb = xhci->event_ring->first_seg->trbs,
2010 : 0 : .end_trb = &xhci->event_ring->first_seg->trbs[TRBS_PER_SEGMENT - 1],
2011 : 0 : .input_dma = xhci->cmd_ring->first_seg->dma,
2012 : : .result_seg = NULL,
2013 : : },
2014 : : /* Test feeding a valid end TRB from a different ring */
2015 : : { .input_seg = xhci->event_ring->first_seg,
2016 : : .start_trb = xhci->event_ring->first_seg->trbs,
2017 : 0 : .end_trb = &xhci->cmd_ring->first_seg->trbs[TRBS_PER_SEGMENT - 1],
2018 : : .input_dma = xhci->cmd_ring->first_seg->dma,
2019 : : .result_seg = NULL,
2020 : : },
2021 : : /* Test feeding a valid start and end TRB from a different ring */
2022 : : { .input_seg = xhci->event_ring->first_seg,
2023 : : .start_trb = xhci->cmd_ring->first_seg->trbs,
2024 : : .end_trb = &xhci->cmd_ring->first_seg->trbs[TRBS_PER_SEGMENT - 1],
2025 : : .input_dma = xhci->cmd_ring->first_seg->dma,
2026 : : .result_seg = NULL,
2027 : : },
2028 : : /* TRB in this ring, but after this TD */
2029 : : { .input_seg = xhci->event_ring->first_seg,
2030 : : .start_trb = &xhci->event_ring->first_seg->trbs[0],
2031 : 0 : .end_trb = &xhci->event_ring->first_seg->trbs[3],
2032 : 0 : .input_dma = xhci->event_ring->first_seg->dma + 4*16,
2033 : : .result_seg = NULL,
2034 : : },
2035 : : /* TRB in this ring, but before this TD */
2036 : : { .input_seg = xhci->event_ring->first_seg,
2037 : : .start_trb = &xhci->event_ring->first_seg->trbs[3],
2038 : 0 : .end_trb = &xhci->event_ring->first_seg->trbs[6],
2039 : 0 : .input_dma = xhci->event_ring->first_seg->dma + 2*16,
2040 : : .result_seg = NULL,
2041 : : },
2042 : : /* TRB in this ring, but after this wrapped TD */
2043 : : { .input_seg = xhci->event_ring->first_seg,
2044 : 0 : .start_trb = &xhci->event_ring->first_seg->trbs[TRBS_PER_SEGMENT - 3],
2045 : 0 : .end_trb = &xhci->event_ring->first_seg->trbs[1],
2046 : : .input_dma = xhci->event_ring->first_seg->dma + 2*16,
2047 : : .result_seg = NULL,
2048 : : },
2049 : : /* TRB in this ring, but before this wrapped TD */
2050 : : { .input_seg = xhci->event_ring->first_seg,
2051 : : .start_trb = &xhci->event_ring->first_seg->trbs[TRBS_PER_SEGMENT - 3],
2052 : : .end_trb = &xhci->event_ring->first_seg->trbs[1],
2053 : 0 : .input_dma = xhci->event_ring->first_seg->dma + (TRBS_PER_SEGMENT - 4)*16,
2054 : : .result_seg = NULL,
2055 : : },
2056 : : /* TRB not in this ring, and we have a wrapped TD */
2057 : : { .input_seg = xhci->event_ring->first_seg,
2058 : : .start_trb = &xhci->event_ring->first_seg->trbs[TRBS_PER_SEGMENT - 3],
2059 : : .end_trb = &xhci->event_ring->first_seg->trbs[1],
2060 : 0 : .input_dma = xhci->cmd_ring->first_seg->dma + 2*16,
2061 : : .result_seg = NULL,
2062 : : },
2063 : : };
2064 : :
2065 : 0 : unsigned int num_tests;
2066 : 0 : int i, ret;
2067 : :
2068 : 0 : num_tests = ARRAY_SIZE(simple_test_vector);
2069 [ # # ]: 0 : for (i = 0; i < num_tests; i++) {
2070 : 0 : ret = xhci_test_trb_in_td(xhci,
2071 : : xhci->event_ring->first_seg,
2072 : : xhci->event_ring->first_seg->trbs,
2073 : 0 : &xhci->event_ring->first_seg->trbs[TRBS_PER_SEGMENT - 1],
2074 : : simple_test_vector[i].input_dma,
2075 : : simple_test_vector[i].result_seg,
2076 : : "Simple", i);
2077 [ # # ]: 0 : if (ret < 0)
2078 : 0 : return ret;
2079 : : }
2080 : :
2081 : : num_tests = ARRAY_SIZE(complex_test_vector);
2082 [ # # ]: 0 : for (i = 0; i < num_tests; i++) {
2083 : 0 : ret = xhci_test_trb_in_td(xhci,
2084 : : complex_test_vector[i].input_seg,
2085 : : complex_test_vector[i].start_trb,
2086 : : complex_test_vector[i].end_trb,
2087 : : complex_test_vector[i].input_dma,
2088 : : complex_test_vector[i].result_seg,
2089 : : "Complex", i);
2090 [ # # ]: 0 : if (ret < 0)
2091 : 0 : return ret;
2092 : : }
2093 : : xhci_dbg(xhci, "TRB math tests passed.\n");
2094 : : return 0;
2095 : : }
2096 : :
2097 : 0 : static void xhci_set_hc_event_deq(struct xhci_hcd *xhci)
2098 : : {
2099 : 0 : u64 temp;
2100 : 0 : dma_addr_t deq;
2101 : :
2102 : 0 : deq = xhci_trb_virt_to_dma(xhci->event_ring->deq_seg,
2103 : 0 : xhci->event_ring->dequeue);
2104 [ # # # # ]: 0 : if (deq == 0 && !in_interrupt())
2105 : 0 : xhci_warn(xhci, "WARN something wrong with SW event ring "
2106 : : "dequeue ptr.\n");
2107 : : /* Update HC event ring dequeue pointer */
2108 : 0 : temp = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
2109 : 0 : temp &= ERST_PTR_MASK;
2110 : : /* Don't clear the EHB bit (which is RW1C) because
2111 : : * there might be more events to service.
2112 : : */
2113 : 0 : temp &= ~ERST_EHB;
2114 : 0 : xhci_dbg_trace(xhci, trace_xhci_dbg_init,
2115 : : "// Write event ring dequeue pointer, "
2116 : : "preserving EHB bit");
2117 : 0 : xhci_write_64(xhci, ((u64) deq & (u64) ~ERST_PTR_MASK) | temp,
2118 : 0 : &xhci->ir_set->erst_dequeue);
2119 : 0 : }
2120 : :
2121 : 0 : static void xhci_add_in_port(struct xhci_hcd *xhci, unsigned int num_ports,
2122 : : __le32 __iomem *addr, int max_caps)
2123 : : {
2124 : 0 : u32 temp, port_offset, port_count;
2125 : 0 : int i;
2126 : 0 : u8 major_revision, minor_revision;
2127 : 0 : struct xhci_hub *rhub;
2128 : 0 : struct device *dev = xhci_to_hcd(xhci)->self.sysdev;
2129 : 0 : struct xhci_port_cap *port_cap;
2130 : :
2131 : 0 : temp = readl(addr);
2132 : 0 : major_revision = XHCI_EXT_PORT_MAJOR(temp);
2133 : 0 : minor_revision = XHCI_EXT_PORT_MINOR(temp);
2134 : :
2135 [ # # ]: 0 : if (major_revision == 0x03) {
2136 : 0 : rhub = &xhci->usb3_rhub;
2137 [ # # ]: 0 : } else if (major_revision <= 0x02) {
2138 : 0 : rhub = &xhci->usb2_rhub;
2139 : : } else {
2140 : 0 : xhci_warn(xhci, "Ignoring unknown port speed, "
2141 : : "Ext Cap %p, revision = 0x%x\n",
2142 : : addr, major_revision);
2143 : : /* Ignoring port protocol we can't understand. FIXME */
2144 : 0 : return;
2145 : : }
2146 : 0 : rhub->maj_rev = XHCI_EXT_PORT_MAJOR(temp);
2147 : :
2148 [ # # ]: 0 : if (rhub->min_rev < minor_revision)
2149 : 0 : rhub->min_rev = minor_revision;
2150 : :
2151 : : /* Port offset and count in the third dword, see section 7.2 */
2152 : 0 : temp = readl(addr + 2);
2153 : 0 : port_offset = XHCI_EXT_PORT_OFF(temp);
2154 : 0 : port_count = XHCI_EXT_PORT_COUNT(temp);
2155 : 0 : xhci_dbg_trace(xhci, trace_xhci_dbg_init,
2156 : : "Ext Cap %p, port offset = %u, "
2157 : : "count = %u, revision = 0x%x",
2158 : : addr, port_offset, port_count, major_revision);
2159 : : /* Port count includes the current port offset */
2160 [ # # # # ]: 0 : if (port_offset == 0 || (port_offset + port_count - 1) > num_ports)
2161 : : /* WTF? "Valid values are ‘1’ to MaxPorts" */
2162 : : return;
2163 : :
2164 : 0 : port_cap = &xhci->port_caps[xhci->num_port_caps++];
2165 [ # # ]: 0 : if (xhci->num_port_caps > max_caps)
2166 : : return;
2167 : :
2168 : 0 : port_cap->maj_rev = major_revision;
2169 : 0 : port_cap->min_rev = minor_revision;
2170 : 0 : port_cap->psi_count = XHCI_EXT_PORT_PSIC(temp);
2171 : :
2172 [ # # ]: 0 : if (port_cap->psi_count) {
2173 : 0 : port_cap->psi = kcalloc_node(port_cap->psi_count,
2174 : : sizeof(*port_cap->psi),
2175 : : GFP_KERNEL, dev_to_node(dev));
2176 [ # # ]: 0 : if (!port_cap->psi)
2177 : 0 : port_cap->psi_count = 0;
2178 : :
2179 : 0 : port_cap->psi_uid_count++;
2180 [ # # ]: 0 : for (i = 0; i < port_cap->psi_count; i++) {
2181 : 0 : port_cap->psi[i] = readl(addr + 4 + i);
2182 : :
2183 : : /* count unique ID values, two consecutive entries can
2184 : : * have the same ID if link is assymetric
2185 : : */
2186 [ # # ]: 0 : if (i && (XHCI_EXT_PORT_PSIV(port_cap->psi[i]) !=
2187 [ # # ]: 0 : XHCI_EXT_PORT_PSIV(port_cap->psi[i - 1])))
2188 : 0 : port_cap->psi_uid_count++;
2189 : :
2190 : 0 : xhci_dbg(xhci, "PSIV:%d PSIE:%d PLT:%d PFD:%d LP:%d PSIM:%d\n",
2191 : : XHCI_EXT_PORT_PSIV(port_cap->psi[i]),
2192 : : XHCI_EXT_PORT_PSIE(port_cap->psi[i]),
2193 : : XHCI_EXT_PORT_PLT(port_cap->psi[i]),
2194 : : XHCI_EXT_PORT_PFD(port_cap->psi[i]),
2195 : : XHCI_EXT_PORT_LP(port_cap->psi[i]),
2196 : : XHCI_EXT_PORT_PSIM(port_cap->psi[i]));
2197 : : }
2198 : : }
2199 : : /* cache usb2 port capabilities */
2200 [ # # # # ]: 0 : if (major_revision < 0x03 && xhci->num_ext_caps < max_caps)
2201 : 0 : xhci->ext_caps[xhci->num_ext_caps++] = temp;
2202 : :
2203 [ # # # # ]: 0 : if ((xhci->hci_version >= 0x100) && (major_revision != 0x03) &&
2204 [ # # ]: 0 : (temp & XHCI_HLC)) {
2205 : 0 : xhci_dbg_trace(xhci, trace_xhci_dbg_init,
2206 : : "xHCI 1.0: support USB2 hardware lpm");
2207 : 0 : xhci->hw_lpm_support = 1;
2208 : : }
2209 : :
2210 : 0 : port_offset--;
2211 [ # # ]: 0 : for (i = port_offset; i < (port_offset + port_count); i++) {
2212 : 0 : struct xhci_port *hw_port = &xhci->hw_ports[i];
2213 : : /* Duplicate entry. Ignore the port if the revisions differ. */
2214 [ # # ]: 0 : if (hw_port->rhub) {
2215 : 0 : xhci_warn(xhci, "Duplicate port entry, Ext Cap %p,"
2216 : : " port %u\n", addr, i);
2217 : 0 : xhci_warn(xhci, "Port was marked as USB %u, "
2218 : : "duplicated as USB %u\n",
2219 : : hw_port->rhub->maj_rev, major_revision);
2220 : : /* Only adjust the roothub port counts if we haven't
2221 : : * found a similar duplicate.
2222 : : */
2223 [ # # ]: 0 : if (hw_port->rhub != rhub &&
2224 [ # # ]: 0 : hw_port->hcd_portnum != DUPLICATE_ENTRY) {
2225 : 0 : hw_port->rhub->num_ports--;
2226 : 0 : hw_port->hcd_portnum = DUPLICATE_ENTRY;
2227 : : }
2228 : 0 : continue;
2229 : : }
2230 : 0 : hw_port->rhub = rhub;
2231 : 0 : hw_port->port_cap = port_cap;
2232 : 0 : rhub->num_ports++;
2233 : : }
2234 : : /* FIXME: Should we disable ports not in the Extended Capabilities? */
2235 : : }
2236 : :
2237 : 0 : static void xhci_create_rhub_port_array(struct xhci_hcd *xhci,
2238 : : struct xhci_hub *rhub, gfp_t flags)
2239 : : {
2240 : 0 : int port_index = 0;
2241 : 0 : int i;
2242 [ # # ]: 0 : struct device *dev = xhci_to_hcd(xhci)->self.sysdev;
2243 : :
2244 [ # # ]: 0 : if (!rhub->num_ports)
2245 : : return;
2246 : 0 : rhub->ports = kcalloc_node(rhub->num_ports, sizeof(rhub->ports), flags,
2247 : : dev_to_node(dev));
2248 [ # # ]: 0 : for (i = 0; i < HCS_MAX_PORTS(xhci->hcs_params1); i++) {
2249 [ # # ]: 0 : if (xhci->hw_ports[i].rhub != rhub ||
2250 [ # # ]: 0 : xhci->hw_ports[i].hcd_portnum == DUPLICATE_ENTRY)
2251 : 0 : continue;
2252 : 0 : xhci->hw_ports[i].hcd_portnum = port_index;
2253 : 0 : rhub->ports[port_index] = &xhci->hw_ports[i];
2254 : 0 : port_index++;
2255 [ # # ]: 0 : if (port_index == rhub->num_ports)
2256 : : break;
2257 : : }
2258 : : }
2259 : :
2260 : : /*
2261 : : * Scan the Extended Capabilities for the "Supported Protocol Capabilities" that
2262 : : * specify what speeds each port is supposed to be. We can't count on the port
2263 : : * speed bits in the PORTSC register being correct until a device is connected,
2264 : : * but we need to set up the two fake roothubs with the correct number of USB
2265 : : * 3.0 and USB 2.0 ports at host controller initialization time.
2266 : : */
2267 : 0 : static int xhci_setup_port_arrays(struct xhci_hcd *xhci, gfp_t flags)
2268 : : {
2269 : 0 : void __iomem *base;
2270 : 0 : u32 offset;
2271 : 0 : unsigned int num_ports;
2272 : 0 : int i, j;
2273 : 0 : int cap_count = 0;
2274 : 0 : u32 cap_start;
2275 : 0 : struct device *dev = xhci_to_hcd(xhci)->self.sysdev;
2276 : :
2277 : 0 : num_ports = HCS_MAX_PORTS(xhci->hcs_params1);
2278 : 0 : xhci->hw_ports = kcalloc_node(num_ports, sizeof(*xhci->hw_ports),
2279 : : flags, dev_to_node(dev));
2280 [ # # ]: 0 : if (!xhci->hw_ports)
2281 : : return -ENOMEM;
2282 : :
2283 [ # # ]: 0 : for (i = 0; i < num_ports; i++) {
2284 : 0 : xhci->hw_ports[i].addr = &xhci->op_regs->port_status_base +
2285 : 0 : NUM_PORT_REGS * i;
2286 : 0 : xhci->hw_ports[i].hw_portnum = i;
2287 : : }
2288 : :
2289 : 0 : xhci->rh_bw = kcalloc_node(num_ports, sizeof(*xhci->rh_bw), flags,
2290 : : dev_to_node(dev));
2291 [ # # ]: 0 : if (!xhci->rh_bw)
2292 : : return -ENOMEM;
2293 [ # # ]: 0 : for (i = 0; i < num_ports; i++) {
2294 : 0 : struct xhci_interval_bw_table *bw_table;
2295 : :
2296 : 0 : INIT_LIST_HEAD(&xhci->rh_bw[i].tts);
2297 : 0 : bw_table = &xhci->rh_bw[i].bw_table;
2298 [ # # ]: 0 : for (j = 0; j < XHCI_MAX_INTERVAL; j++)
2299 : 0 : INIT_LIST_HEAD(&bw_table->interval_bw[j].endpoints);
2300 : : }
2301 : 0 : base = &xhci->cap_regs->hc_capbase;
2302 : :
2303 : 0 : cap_start = xhci_find_next_ext_cap(base, 0, XHCI_EXT_CAPS_PROTOCOL);
2304 [ # # ]: 0 : if (!cap_start) {
2305 : 0 : xhci_err(xhci, "No Extended Capability registers, unable to set up roothub\n");
2306 : 0 : return -ENODEV;
2307 : : }
2308 : :
2309 : : offset = cap_start;
2310 : : /* count extended protocol capability entries for later caching */
2311 [ # # ]: 0 : while (offset) {
2312 : 0 : cap_count++;
2313 : 0 : offset = xhci_find_next_ext_cap(base, offset,
2314 : : XHCI_EXT_CAPS_PROTOCOL);
2315 : : }
2316 : :
2317 : 0 : xhci->ext_caps = kcalloc_node(cap_count, sizeof(*xhci->ext_caps),
2318 : : flags, dev_to_node(dev));
2319 [ # # ]: 0 : if (!xhci->ext_caps)
2320 : : return -ENOMEM;
2321 : :
2322 : 0 : xhci->port_caps = kcalloc_node(cap_count, sizeof(*xhci->port_caps),
2323 : : flags, dev_to_node(dev));
2324 [ # # ]: 0 : if (!xhci->port_caps)
2325 : : return -ENOMEM;
2326 : :
2327 : : offset = cap_start;
2328 : :
2329 [ # # ]: 0 : while (offset) {
2330 : 0 : xhci_add_in_port(xhci, num_ports, base + offset, cap_count);
2331 [ # # ]: 0 : if (xhci->usb2_rhub.num_ports + xhci->usb3_rhub.num_ports ==
2332 : : num_ports)
2333 : : break;
2334 : 0 : offset = xhci_find_next_ext_cap(base, offset,
2335 : : XHCI_EXT_CAPS_PROTOCOL);
2336 : : }
2337 [ # # # # ]: 0 : if (xhci->usb2_rhub.num_ports == 0 && xhci->usb3_rhub.num_ports == 0) {
2338 : 0 : xhci_warn(xhci, "No ports on the roothubs?\n");
2339 : 0 : return -ENODEV;
2340 : : }
2341 : 0 : xhci_dbg_trace(xhci, trace_xhci_dbg_init,
2342 : : "Found %u USB 2.0 ports and %u USB 3.0 ports.",
2343 : : xhci->usb2_rhub.num_ports, xhci->usb3_rhub.num_ports);
2344 : :
2345 : : /* Place limits on the number of roothub ports so that the hub
2346 : : * descriptors aren't longer than the USB core will allocate.
2347 : : */
2348 [ # # ]: 0 : if (xhci->usb3_rhub.num_ports > USB_SS_MAXPORTS) {
2349 : 0 : xhci_dbg_trace(xhci, trace_xhci_dbg_init,
2350 : : "Limiting USB 3.0 roothub ports to %u.",
2351 : : USB_SS_MAXPORTS);
2352 : 0 : xhci->usb3_rhub.num_ports = USB_SS_MAXPORTS;
2353 : : }
2354 [ # # ]: 0 : if (xhci->usb2_rhub.num_ports > USB_MAXCHILDREN) {
2355 : 0 : xhci_dbg_trace(xhci, trace_xhci_dbg_init,
2356 : : "Limiting USB 2.0 roothub ports to %u.",
2357 : : USB_MAXCHILDREN);
2358 : 0 : xhci->usb2_rhub.num_ports = USB_MAXCHILDREN;
2359 : : }
2360 : :
2361 : : /*
2362 : : * Note we could have all USB 3.0 ports, or all USB 2.0 ports.
2363 : : * Not sure how the USB core will handle a hub with no ports...
2364 : : */
2365 : :
2366 : 0 : xhci_create_rhub_port_array(xhci, &xhci->usb2_rhub, flags);
2367 : 0 : xhci_create_rhub_port_array(xhci, &xhci->usb3_rhub, flags);
2368 : :
2369 : 0 : return 0;
2370 : : }
2371 : :
2372 : 0 : int xhci_mem_init(struct xhci_hcd *xhci, gfp_t flags)
2373 : : {
2374 : 0 : dma_addr_t dma;
2375 : 0 : struct device *dev = xhci_to_hcd(xhci)->self.sysdev;
2376 : 0 : unsigned int val, val2;
2377 : 0 : u64 val_64;
2378 : 0 : u32 page_size, temp;
2379 : 0 : int i, ret;
2380 : :
2381 : 0 : INIT_LIST_HEAD(&xhci->cmd_list);
2382 : :
2383 : : /* init command timeout work */
2384 : 0 : INIT_DELAYED_WORK(&xhci->cmd_timer, xhci_handle_command_timeout);
2385 : 0 : init_completion(&xhci->cmd_ring_stop_completion);
2386 : :
2387 : 0 : page_size = readl(&xhci->op_regs->page_size);
2388 : 0 : xhci_dbg_trace(xhci, trace_xhci_dbg_init,
2389 : : "Supported page size register = 0x%x", page_size);
2390 [ # # ]: 0 : for (i = 0; i < 16; i++) {
2391 [ # # ]: 0 : if ((0x1 & page_size) != 0)
2392 : : break;
2393 : 0 : page_size = page_size >> 1;
2394 : : }
2395 [ # # ]: 0 : if (i < 16)
2396 : 0 : xhci_dbg_trace(xhci, trace_xhci_dbg_init,
2397 : 0 : "Supported page size of %iK", (1 << (i+12)) / 1024);
2398 : : else
2399 : 0 : xhci_warn(xhci, "WARN: no supported page size\n");
2400 : : /* Use 4K pages, since that's common and the minimum the HC supports */
2401 : 0 : xhci->page_shift = 12;
2402 : 0 : xhci->page_size = 1 << xhci->page_shift;
2403 : 0 : xhci_dbg_trace(xhci, trace_xhci_dbg_init,
2404 : : "HCD page size set to %iK", xhci->page_size / 1024);
2405 : :
2406 : : /*
2407 : : * Program the Number of Device Slots Enabled field in the CONFIG
2408 : : * register with the max value of slots the HC can handle.
2409 : : */
2410 : 0 : val = HCS_MAX_SLOTS(readl(&xhci->cap_regs->hcs_params1));
2411 : 0 : xhci_dbg_trace(xhci, trace_xhci_dbg_init,
2412 : : "// xHC can handle at most %d device slots.", val);
2413 : 0 : val2 = readl(&xhci->op_regs->config_reg);
2414 : 0 : val |= (val2 & ~HCS_SLOTS_MASK);
2415 : 0 : xhci_dbg_trace(xhci, trace_xhci_dbg_init,
2416 : : "// Setting Max device slots reg = 0x%x.", val);
2417 : 0 : writel(val, &xhci->op_regs->config_reg);
2418 : :
2419 : : /*
2420 : : * xHCI section 5.4.6 - doorbell array must be
2421 : : * "physically contiguous and 64-byte (cache line) aligned".
2422 : : */
2423 : 0 : xhci->dcbaa = dma_alloc_coherent(dev, sizeof(*xhci->dcbaa), &dma,
2424 : : flags);
2425 [ # # ]: 0 : if (!xhci->dcbaa)
2426 : 0 : goto fail;
2427 : 0 : xhci->dcbaa->dma = dma;
2428 : 0 : xhci_dbg_trace(xhci, trace_xhci_dbg_init,
2429 : : "// Device context base array address = 0x%llx (DMA), %p (virt)",
2430 : 0 : (unsigned long long)xhci->dcbaa->dma, xhci->dcbaa);
2431 : 0 : xhci_write_64(xhci, dma, &xhci->op_regs->dcbaa_ptr);
2432 : :
2433 : : /*
2434 : : * Initialize the ring segment pool. The ring must be a contiguous
2435 : : * structure comprised of TRBs. The TRBs must be 16 byte aligned,
2436 : : * however, the command ring segment needs 64-byte aligned segments
2437 : : * and our use of dma addresses in the trb_address_map radix tree needs
2438 : : * TRB_SEGMENT_SIZE alignment, so we pick the greater alignment need.
2439 : : */
2440 : 0 : xhci->segment_pool = dma_pool_create("xHCI ring segments", dev,
2441 : 0 : TRB_SEGMENT_SIZE, TRB_SEGMENT_SIZE, xhci->page_size);
2442 : :
2443 : : /* See Table 46 and Note on Figure 55 */
2444 : 0 : xhci->device_pool = dma_pool_create("xHCI input/output contexts", dev,
2445 : 0 : 2112, 64, xhci->page_size);
2446 [ # # # # ]: 0 : if (!xhci->segment_pool || !xhci->device_pool)
2447 : 0 : goto fail;
2448 : :
2449 : : /* Linear stream context arrays don't have any boundary restrictions,
2450 : : * and only need to be 16-byte aligned.
2451 : : */
2452 : 0 : xhci->small_streams_pool =
2453 : 0 : dma_pool_create("xHCI 256 byte stream ctx arrays",
2454 : : dev, SMALL_STREAM_ARRAY_SIZE, 16, 0);
2455 : 0 : xhci->medium_streams_pool =
2456 : 0 : dma_pool_create("xHCI 1KB stream ctx arrays",
2457 : : dev, MEDIUM_STREAM_ARRAY_SIZE, 16, 0);
2458 : : /* Any stream context array bigger than MEDIUM_STREAM_ARRAY_SIZE
2459 : : * will be allocated with dma_alloc_coherent()
2460 : : */
2461 : :
2462 [ # # # # ]: 0 : if (!xhci->small_streams_pool || !xhci->medium_streams_pool)
2463 : 0 : goto fail;
2464 : :
2465 : : /* Set up the command ring to have one segments for now. */
2466 : 0 : xhci->cmd_ring = xhci_ring_alloc(xhci, 1, 1, TYPE_COMMAND, 0, flags);
2467 [ # # ]: 0 : if (!xhci->cmd_ring)
2468 : 0 : goto fail;
2469 : 0 : xhci_dbg_trace(xhci, trace_xhci_dbg_init,
2470 : : "Allocated command ring at %p", xhci->cmd_ring);
2471 : 0 : xhci_dbg_trace(xhci, trace_xhci_dbg_init, "First segment DMA is 0x%llx",
2472 : 0 : (unsigned long long)xhci->cmd_ring->first_seg->dma);
2473 : :
2474 : : /* Set the address in the Command Ring Control register */
2475 : 0 : val_64 = xhci_read_64(xhci, &xhci->op_regs->cmd_ring);
2476 : 0 : val_64 = (val_64 & (u64) CMD_RING_RSVD_BITS) |
2477 : 0 : (xhci->cmd_ring->first_seg->dma & (u64) ~CMD_RING_RSVD_BITS) |
2478 : 0 : xhci->cmd_ring->cycle_state;
2479 : 0 : xhci_dbg_trace(xhci, trace_xhci_dbg_init,
2480 : : "// Setting command ring address to 0x%016llx", val_64);
2481 : 0 : xhci_write_64(xhci, val_64, &xhci->op_regs->cmd_ring);
2482 : :
2483 : 0 : xhci->lpm_command = xhci_alloc_command_with_ctx(xhci, true, flags);
2484 [ # # ]: 0 : if (!xhci->lpm_command)
2485 : 0 : goto fail;
2486 : :
2487 : : /* Reserve one command ring TRB for disabling LPM.
2488 : : * Since the USB core grabs the shared usb_bus bandwidth mutex before
2489 : : * disabling LPM, we only need to reserve one TRB for all devices.
2490 : : */
2491 : 0 : xhci->cmd_ring_reserved_trbs++;
2492 : :
2493 : 0 : val = readl(&xhci->cap_regs->db_off);
2494 : 0 : val &= DBOFF_MASK;
2495 : 0 : xhci_dbg_trace(xhci, trace_xhci_dbg_init,
2496 : : "// Doorbell array is located at offset 0x%x"
2497 : : " from cap regs base addr", val);
2498 : 0 : xhci->dba = (void __iomem *) xhci->cap_regs + val;
2499 : : /* Set ir_set to interrupt register set 0 */
2500 : 0 : xhci->ir_set = &xhci->run_regs->ir_set[0];
2501 : :
2502 : : /*
2503 : : * Event ring setup: Allocate a normal ring, but also setup
2504 : : * the event ring segment table (ERST). Section 4.9.3.
2505 : : */
2506 : 0 : xhci_dbg_trace(xhci, trace_xhci_dbg_init, "// Allocating event ring");
2507 : 0 : xhci->event_ring = xhci_ring_alloc(xhci, ERST_NUM_SEGS, 1, TYPE_EVENT,
2508 : : 0, flags);
2509 [ # # ]: 0 : if (!xhci->event_ring)
2510 : 0 : goto fail;
2511 [ # # ]: 0 : if (xhci_check_trb_in_td_math(xhci) < 0)
2512 : 0 : goto fail;
2513 : :
2514 : 0 : ret = xhci_alloc_erst(xhci, xhci->event_ring, &xhci->erst, flags);
2515 [ # # ]: 0 : if (ret)
2516 : 0 : goto fail;
2517 : :
2518 : : /* set ERST count with the number of entries in the segment table */
2519 : 0 : val = readl(&xhci->ir_set->erst_size);
2520 : 0 : val &= ERST_SIZE_MASK;
2521 : 0 : val |= ERST_NUM_SEGS;
2522 : 0 : xhci_dbg_trace(xhci, trace_xhci_dbg_init,
2523 : : "// Write ERST size = %i to ir_set 0 (some bits preserved)",
2524 : : val);
2525 : 0 : writel(val, &xhci->ir_set->erst_size);
2526 : :
2527 : 0 : xhci_dbg_trace(xhci, trace_xhci_dbg_init,
2528 : : "// Set ERST entries to point to event ring.");
2529 : : /* set the segment table base address */
2530 : 0 : xhci_dbg_trace(xhci, trace_xhci_dbg_init,
2531 : : "// Set ERST base address for ir_set 0 = 0x%llx",
2532 : 0 : (unsigned long long)xhci->erst.erst_dma_addr);
2533 : 0 : val_64 = xhci_read_64(xhci, &xhci->ir_set->erst_base);
2534 : 0 : val_64 &= ERST_PTR_MASK;
2535 : 0 : val_64 |= (xhci->erst.erst_dma_addr & (u64) ~ERST_PTR_MASK);
2536 : 0 : xhci_write_64(xhci, val_64, &xhci->ir_set->erst_base);
2537 : :
2538 : : /* Set the event ring dequeue address */
2539 : 0 : xhci_set_hc_event_deq(xhci);
2540 : 0 : xhci_dbg_trace(xhci, trace_xhci_dbg_init,
2541 : : "Wrote ERST address to ir_set 0.");
2542 : :
2543 : : /*
2544 : : * XXX: Might need to set the Interrupter Moderation Register to
2545 : : * something other than the default (~1ms minimum between interrupts).
2546 : : * See section 5.5.1.2.
2547 : : */
2548 [ # # ]: 0 : for (i = 0; i < MAX_HC_SLOTS; i++)
2549 : 0 : xhci->devs[i] = NULL;
2550 [ # # ]: 0 : for (i = 0; i < USB_MAXCHILDREN; i++) {
2551 : 0 : xhci->usb2_rhub.bus_state.resume_done[i] = 0;
2552 : 0 : xhci->usb3_rhub.bus_state.resume_done[i] = 0;
2553 : : /* Only the USB 2.0 completions will ever be used. */
2554 : 0 : init_completion(&xhci->usb2_rhub.bus_state.rexit_done[i]);
2555 : : }
2556 : :
2557 [ # # ]: 0 : if (scratchpad_alloc(xhci, flags))
2558 : 0 : goto fail;
2559 [ # # ]: 0 : if (xhci_setup_port_arrays(xhci, flags))
2560 : 0 : goto fail;
2561 : :
2562 : : /* Enable USB 3.0 device notifications for function remote wake, which
2563 : : * is necessary for allowing USB 3.0 devices to do remote wakeup from
2564 : : * U3 (device suspend).
2565 : : */
2566 : 0 : temp = readl(&xhci->op_regs->dev_notification);
2567 : 0 : temp &= ~DEV_NOTE_MASK;
2568 : 0 : temp |= DEV_NOTE_FWAKE;
2569 : 0 : writel(temp, &xhci->op_regs->dev_notification);
2570 : :
2571 : 0 : return 0;
2572 : :
2573 : 0 : fail:
2574 : 0 : xhci_halt(xhci);
2575 : 0 : xhci_reset(xhci);
2576 : 0 : xhci_mem_cleanup(xhci);
2577 : 0 : return -ENOMEM;
2578 : : }
|
